Buse Ustaoglu

According to our database, Buse Ustaoglu authored at least 8 papers between 2013 and 2022.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2022

Hardware packages for self-verification and secure partial reconfiguration / von Buse Ustaoğlu.

Buse Ustaoglu

PhD thesis, 2022

2019

SAT-Hard: A Learning-Based Hardware SAT-Solver.

Buse Ustaoglu, Sebastian Huhn, Frank Sill Torres, Daniel Große, Rolf Drechsler

Proceedings of the 22nd Euromicro Conference on Digital System Design, 2019

(ReCo)Fuse Your PRC or Lose Security: Finally Reliable Reconfiguration-Based Countermeasures on FPGAs.

Kenneth Schmitz, Buse Ustaoglu, Daniel Große, Rolf Drechsler

Proceedings of the Applied Reconfigurable Computing - 15th International Symposium, 2019

2018

SAT-Lancer: A Hardware SAT-Solver for Self-Verification.

Buse Ustaoglu, Sebastian Huhn, Daniel Große, Rolf Drechsler

Proceedings of the 2018 on Great Lakes Symposium on VLSI, 2018

2016

Reliability analysis of MIPS-32 microprocessor register files designed with different fault tolerant techniques.

Buse Ustaoglu, Berna Örs Yalçin

Proceedings of the 24th Signal Processing and Communication Application Conference, 2016

2015

Creating test environment with UVM for SPI.

Buse Ustaoglu, Ahmet Cagri Bagbaba, Berna Örs, Inan Erdem

Proceedings of the 2015 23nd Signal Processing and Communications Applications Conference (SIU), 2015

Fault tolerant register file design for MIPS AES-crypto microprocessor.

Buse Ustaoglu, Berna Örs Yalçin

Proceedings of the 2015 IEEE International Conference on Electronics, 2015

2013

Throughput enhancement for a new time-delay sampled-data system based True Random Bit Generator.

Ramazan Yeniceri, Buse Ustaoglu, Müstak E. Yalçin

Proceedings of the 21st European Conference on Circuit Theory and Design, 2013