Camel Tanougast
Orcid: 0000-0002-5399-1683
According to our database1,
Camel Tanougast
authored at least 102 papers
between 2000 and 2023.
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Bibliography
2023
IEEE Internet Things J., August, 2023
IEEE CAA J. Autom. Sinica, April, 2023
A One-Dimensional Convolutional Neural Network Model for Predicting the Survival Outcome of Coronavirus Disease 2019.
Proceedings of the 20th IEEE International Symposium on Biomedical Imaging, 2023
Proceedings of the 20th IEEE International Symposium on Biomedical Imaging, 2023
2022
An optimised hardware architecture of the angular-domain cyclostationary detector for cognitive radio communications.
Integr., 2022
High randomness hyperchaos-based parameterizable TRNG: Design, FPGA implementation and exhaustive security analysis.
Displays, 2022
An Efficient and Reliable Chaos-Based IoT Security Core for UDP/IP Wireless Communication.
IEEE Access, 2022
2021
Multim. Tools Appl., 2021
Microprocess. Microsystems, 2021
Design and FPGA Implementation of New Multidimensional Chaotic Map for Secure Communication.
J. Circuits Syst. Comput., 2021
Optimized and robust implementation of mobile networks confidentiality and integrity functions.
Comput. Secur., 2021
Ann. des Télécommunications, 2021
2020
Microprocess. Microsystems, 2020
An efficient and lightweight multi-scroll chaos-based hardware solution for protecting fingerprint biometric templates.
Int. J. Commun. Syst., 2020
Miniaturization of Dielectric Resonator Antenna by Using Artificial Magnetic Conductor Surface.
IEEE Access, 2020
A Wideband Circularly Polarized Linear Parasitic Dielectric Resonators Antenna Array for 5G Applications.
Proceedings of the 2020 IEEE 5th International Symposium on Smart and Wireless Systems within the Conferences on Intelligent Data Acquisition and Advanced Computing Systems (IDAACS-SWS), 2020
2019
Genetic algorithms for scheduling in a CPU/FPGA architecture with heterogeneous communication delays.
Comput. Ind. Eng., 2019
Proceedings of the 10th IEEE International Conference on Intelligent Data Acquisition and Advanced Computing Systems: Technology and Applications, 2019
Miniaturized Off-Centered Fed Dipole Slot Antenna for Multiband Wireless Applications.
Proceedings of the 10th IEEE International Conference on Intelligent Data Acquisition and Advanced Computing Systems: Technology and Applications, 2019
Breast Cancer Detection and Classification based on Multilevel Wavelet Transformation.
Proceedings of the 10th IEEE International Conference on Intelligent Data Acquisition and Advanced Computing Systems: Technology and Applications, 2019
Proceedings of the 10th IEEE International Conference on Intelligent Data Acquisition and Advanced Computing Systems: Technology and Applications, 2019
Predictive Causality of Granger Test for Long Run Equilibrium to Photovoltaic System.
Proceedings of the 10th IEEE International Conference on Intelligent Data Acquisition and Advanced Computing Systems: Technology and Applications, 2019
Proceedings of the 10th IEEE International Conference on Intelligent Data Acquisition and Advanced Computing Systems: Technology and Applications, 2019
Hardware Implementation of Secured Socket Communication based on Chaotic Cryptosystem.
Proceedings of the 2019 International Conference on Cyber Security and Protection of Digital Services, 2019
Supervision and energy management system for smart telecom tower based on the LoRaWAN protocol.
Proceedings of the 6th International Conference on Control, 2019
2018
J. Circuits Syst. Comput., 2018
A U-shaped Wide band frequency reconfigurable dielectric resonator antenna for 5G applications.
Proceedings of the 2018 International Symposium on Networks, Computers and Communications, 2018
Proceedings of the 2018 International Symposium on Networks, Computers and Communications, 2018
Proceedings of the 2018 International Conference on Cyber Security and Protection of Digital Services, 2018
2017
Formal Proof of the Dependable Bypassing Routing Algorithm Suitable for Adaptive Networks on Chip QnoC Architecture.
Syst., 2017
Digital Implementation of an Improved LTE Stream Cipher Snow-3G Based on Hyperchaotic PRNG.
Secur. Commun. Networks, 2017
FPGA implementation of an enhanced SNOW-3G stream cipher based on a hyperchaotic system.
Proceedings of the 4th International Conference on Control, 2017
Proceedings of the 4th International Conference on Control, 2017
A comparison of two metaheuristic algorithms for scheduling problem on a heterogeneous CPU/FPGA architecture with communication delays.
Proceedings of the 4th International Conference on Control, 2017
2016
Extracted magnetic resonance texture features discriminate between phenotypes and are associated with overall survival in glioblastoma multiforme patients.
Medical Biol. Eng. Comput., 2016
Quantitative evaluation of robust skull stripping and tumor detection applied to axial MR images.
Brain Informatics, 2016
2015
High-Throughput Quantification of Phenotype Heterogeneity Using Statistical Features.
Adv. Bioinformatics, 2015
Proceedings of the 2015 Fifth International Conference on Digital Information and Communication Technology and its Applications, 2015
Proceedings of the International Conference on Computer, 2015
2014
Proceedings of the International Conference on Control, 2014
Proceedings of the International Conference on Control, 2014
Proceedings of the International Conference on Control, 2014
Proceedings of the International Conference on Control, 2014
Proceedings of the International Conference on Control, 2014
Proceedings of the International Conference on Control, 2014
Formal specification and verification of wireless networked self-organized Systems on Chip.
Proceedings of the International Conference on Control, 2014
Proceedings of the International Conference on Control, 2014
Low-noise transimpedance amplifier dedicated to biomedical devices: Near infrared spectroscopy system.
Proceedings of the International Conference on Control, 2014
Proceedings of the International Conference on Control, 2014
Snake Method Enhanced using Canny Approach Implementation for Cancer Cells Detection in Real Time .
Proceedings of the BIODEVICES 2014, 2014
2013
J. Real Time Image Process., 2013
Modeling and performance evaluations of Alamouti technique in a single frequency network for DVB-T2.
EURASIP J. Wirel. Commun. Netw., 2013
Design and FPGA implementation of a wireless hyperchaotic communication system for secure real-time image transmission.
EURASIP J. Image Video Process., 2013
Commun. Nonlinear Sci. Numer. Simul., 2013
Synchronized hybrid chaotic generators: Application to real-time wireless speech encryption.
Commun. Nonlinear Sci. Numer. Simul., 2013
Proceedings of the IEEE 11th International New Circuits and Systems Conference, 2013
2012
J. Electr. Comput. Eng., 2012
Proceedings of the 19th International Conference on Telecommunications, 2012
Performance evaluation of SVC coding using MPLP-DVB-T2 for mobile and fixed reception.
Proceedings of the IEEE international Symposium on Broadband Multimedia Systems and Broadcasting, 2012
2011
Hardware Implementation of Chaos Based Cipher: Design of Embedded Systems for Security Applications.
Proceedings of the Chaos-Based Cryptography - Theory, Algorithms and Applications, 2011
New hardware Cryptosystem based chaos for the secure real-time of embedded applications.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2011
A dependable and dynamic network on chip suitable for FPGA-based reconfigurable systems.
Proceedings of the 6th International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2011
Proceedings of the 17th IEEE International On-Line Testing Symposium (IOLTS 2011), 2011
Performance evaluation of distributed Tarokh SFBC and Alamouti MISO for SFN DVB-T2 broadcast networks.
Proceedings of the 18th IEEE International Conference on Electronics, Circuits and Systems, 2011
Strategic placement of reliable routers for the optimization of dependable dynamic NoC.
Proceedings of the 18th IEEE International Conference on Electronics, Circuits and Systems, 2011
2010
A scalable and embedded FPGA architecture for efficient computation of grey level co-occurrence matrices and Haralick textures features.
Microprocess. Microsystems, 2010
Behavioral modeling and C-VHDL co-simulation of Network on Chip on FPGA for Education.
Proceedings of the 5th International Workshop on Reconfigurable Communication-centric Systems on Chip, 2010
Proceedings of the International Conference on Field Programmable Logic and Applications, 2010
Proceedings of the 7th International Symposium on Communication Systems Networks and Digital Signal Processing, 2010
An FPGA implementation of a Feed-Back Chaotic Synchronization for secure communications.
Proceedings of the 7th International Symposium on Communication Systems Networks and Digital Signal Processing, 2010
Proceedings of the 2010 NASA/ESA Conference on Adaptive Hardware and Systems, 2010
2009
An Embedded and Programmable System Based FPGA for Real Time MPEG Stream Buffer Analysis.
IEEE Trans. Circuits Syst. Video Technol., 2009
CuNoC: A dynamic scalable communication structure for dynamically reconfigurable FPGAs.
Microprocess. Microsystems, 2009
Int. J. Reconfigurable Comput., 2009
Proceedings of the 16th IEEE International Conference on Electronics, 2009
Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009
2008
Proceedings of the 21st Annual IEEE International SoC Conference, SoCC 2008, 2008
VLSI Architecture and FPGA Implementation of a Hybrid Message-Embedded Self-Synchronizing Stream Cipher.
Proceedings of the 4th IEEE International Symposium on Electronic Design, 2008
A new high-performance scalable dynamic interconnection for FPGA-based reconfigurable systems.
Proceedings of the 19th IEEE International Conference on Application-Specific Systems, 2008
Proceedings of the Reconfigurable Computing: Architectures, 2008
2007
The Use of Runtime Reconfiguration on FPGA Circuits to Increase the Performance of the AES Algorithm Implementation.
J. Univers. Comput. Sci., 2007
A Dynamic Communication Structure for Dynamically Reconfigurable FPGAs.
Proceedings of the 3rd International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2007
Proceedings of the 14th IEEE International Conference on Electronics, 2007
Proceedings of the FPL 2007, 2007
An Fpga implementation of the HME self-synchronizing stream cipher for Enhanced security and performance.
Proceedings of the Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), 2007
Proceedings of the Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), 2007
A Hardware Preemptive Multitasking Mechanism Based on Scan-path Register Structure for FPGA-based Reconfigurable Systems.
Proceedings of the Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), 2007
2006
Toward a methodology for optimizing algorithm-architecture adequacy for implementation reconfigurable system.
Proceedings of the 13th IEEE International Conference on Electronics, 2006
2005
Configurable hardware implementation of a conceptual decoder for a real-time MPEG-2 analysis.
Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005
2004
SystemC Model of a MPEG-2 DVB-T Bit-Rate Measurement Architecture for FPGA Implementation.
Proceedings of the 15th IEEE International Workshop on Rapid System Prototyping (RSP 2004), 2004
FPGA Implementation of a Novel All Digital PLL Architecture for PCR Related Measurements in DVB-T.
Proceedings of the Field Programmable Logic and Application, 2004
FPGA Implementation of a Novel Architecture for PCR Related Measurements In DVB-T.
Proceedings of the International Conference on Embedded Systems and Applications, 2004
2003
Linear array processors with multiple access modes memory for real-time image processing.
Real Time Imaging, 2003
Temporal partitioning methodology optimizing FPGA resources for dynamically reconfigurable embedded real-time system.
Microprocess. Microsystems, 2003
A Partitioning Methodology That Optimises the Area on Reconfigurable Real-Time Embedded Systems.
EURASIP J. Adv. Signal Process., 2003
Proceedings of the 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC'03), 30 June, 2003
Automated RTR Temporal Partitioning for Reconfigurable Embedded Real-Time System Design.
Proceedings of the 17th International Parallel and Distributed Processing Symposium (IPDPS 2003), 2003
2000
Proceedings of the Parallel and Distributed Processing, 2000