Caroline Benveniste

According to our database1, Caroline Benveniste authored at least 9 papers between 1990 and 2001.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2001
Cache-Memory Interfaces in Compressed Memory Systems.
IEEE Trans. Computers, 2001

1998
The Design of COMPASS: An Execution Driven Simulator for Commercial Applications Running on Shared Memory Multiprocessors.
Proceedings of the 12th International Parallel Processing Symposium / 9th Symposium on Parallel and Distributed Processing (IPPS/SPDP '98), March 30, 1998

1997
Clock Synchronization on a Multicomputer.
J. Parallel Distrib. Comput., 1997

1996
Performance Evaluation of a Massively Parallel I/O Subsystem.
Proceedings of the Input/Output in Parallel and Distributed Computer Systems., 1996

1995
Parallel Simulation of the IBM SP2 Interconnection Network.
Proceedings of the 27th conference on Winter simulation, 1995

Performance Evaluation of a Parallel I/O Architecture.
Proceedings of the 9th international conference on Supercomputing, 1995

1994
Performance evaluation of a massively parallel I/O subsystem.
SIGARCH Computer Architecture News, 1994

A methodology for evaluating parallel I/O performance for massively parallel processors.
Proceedings of the Proceedings 27th Annual Simulation Symposium, 1994

1990
A trace-driven analysis of the 'wrap-around' network.
Proceedings of the 1990 IEEE International Conference on Computer Design: VLSI in Computers and Processors, 1990


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