Yarsun Hsu

According to our database1, Yarsun Hsu authored at least 52 papers between 1990 and 2016.

Collaborative distances:

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2016
Binary descriptor based SIFT and hardware implementation.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

DeAr: A framework for power-efficient and flexible embedded digital signal processor design.
Proceedings of the 2016 IEEE Asia Pacific Conference on Circuits and Systems, 2016

2015
Accelerating AdaBoost algorithm using GPU for multi-object recognition.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

Message scheduling and timing analysis for flexray dynamic segment by considering slot-multiplexing.
Proceedings of the IEEE International Conference on Vehicular Electronics and Safety, 2015

2014
Design and Evaluation of Dynamically-Allocated Multi-queue Buffers with Multiple Packets for NoC Routers.
Proceedings of the Sixth International Symposium on Parallel Architectures, 2014

A Runtime Framework for GPGPU.
Proceedings of the Sixth International Symposium on Parallel Architectures, 2014

A hybrid on-chip network with a low buffer requirement.
Proceedings of the 20th IEEE International Conference on Parallel and Distributed Systems, 2014

A Reliable and Secure GPU-Assisted File System.
Proceedings of the Algorithms and Architectures for Parallel Processing, 2014

2013
Low Propagation Delay Load-Balanced 4 × 4 Switch Fabric IC in 0.13-µm CMOS Technology.
IEEE Trans. VLSI Syst., 2013

2012
An 8 × 8 20 Gbps Reconfigurable Load Balanced TDM Switch IC for High-Speed Networking.
Signal Processing Systems, 2012

A Novel Low Gate-Count Pipeline Topology With Multiplexer-Flip-Flops for Serial Link.
IEEE Trans. on Circuits and Systems, 2012

A novel low gate-count serializer topology with Multiplexer-Flip-Flops.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

Achieving Global Fairness for On-Chip Network Using Group Allocation.
Proceedings of the 26th IEEE International Parallel and Distributed Processing Symposium Workshops & PhD Forum, 2012

Cluster-Based CAN with Enhanced Transmission Capability for Vehicle Networks.
Proceedings of the 2012 International Conference on Connected Vehicles and Expo, 2012

2011
Implementation and analysis of speculative flow control for on-chip interconnection network.
Proceedings of the 2nd IEEE International Conference on Networked Embedded Systems for Enterprise Applications, 2011

Group allocation: A novel fairness mechanism for on-chip network.
Proceedings of the 2nd IEEE International Conference on Networked Embedded Systems for Enterprise Applications, 2011

A Novel Architecture and Routing Algorithm for Dynamic Reconfigurable Network-on-Chip.
Proceedings of the IEEE International Symposium on Parallel and Distributed Processing with Applications, 2011

A 32Gbps low propagation delay 4×4 switch IC for feedback-based system in 0.13μm CMOS technology.
Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011

2010
A System Exploration Platform for Network-on-Chip.
Proceedings of the IEEE International Symposium on Parallel and Distributed Processing with Applications, 2010

A novel MUX-FF circuit for low power and high speed serial link interfaces.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

A 32Gbps low propagation delay 4×4 switch IC for feedback-based system in 0.13μm CMOS technology.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

Emulation of Object-Based Storage Devices by a Virtual Machine.
Proceedings of the Algorithms and Architectures for Parallel Processing, 2010

A Flexible and Cost-Effective File-Wise Reliability Scheme for Storage Systems.
Proceedings of the 12th IEEE International Conference on High Performance Computing and Communications, 2010

2008
A 28Gbps 4×4 switch with low jitter SerDes using area-saving RF model in 0.13µm CMOS technology.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

Cycle Stealing and Channel Management for On-Chip Networks.
Proceedings of the 10th IEEE International Conference on High Performance Computing and Communications, 2008

2007
Reliable Parallel File System with Parity Cache Table Support.
IEICE Transactions, 2007

Design of ultra low power CML MUXs and latches with forward body bias.
Proceedings of the 2007 IEEE International SOC Conference, 2007

A Scalable Load Balanced Birkhoff-von Neumann Symmetric TDM Switch IC for High-Speed Networking Applications.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

A Windows-Based Parallel File System.
Proceedings of the High Performance Computing and Communications, 2007

Security Enhancement and Performance Evaluation of an Object-Based Storage System.
Proceedings of the High Performance Computing and Communications, 2007

2006
DPCT: Distributed Parity Cache Table for Redundant Parallel File System.
Proceedings of the High Performance Computing and Communications, 2006

Striping Cache: A Global Cache for Striped Network File System.
Proceedings of the Advances in Computer Systems Architecture, 11th Asia-Pacific Conference, 2006

2005
A 10 Gb/s Wide-Band Current-Mode Logic I/O Interface for High-Speed Interconnect in 0.18μm CMOS Technology.
Proceedings of the Proceedings 2005 IEEE International SOC Conference, 2005

Modularized Redundant Parallel Virtual File System.
Proceedings of the Advances in Computer Systems Architecture, 10th Asia-Pacific Conference, 2005

2000
Memory system behavior of Java programs: methodology and analysis.
Proceedings of the 2000 ACM SIGMETRICS international conference on Measurement and modeling of computer systems, 2000

1997
Parallel Systems and Parallel I/O Technology.
Proceedings of the 1997 International Conference on Parallel and Distributed Systems (ICPADS '97), 1997

1996
Video on Demand Using the Vesta Parallel File System.
Proceedings of the Input/Output in Parallel and Distributed Computer Systems., 1996

Overview of the MPI-IO Parallel I/O Interface.
Proceedings of the Input/Output in Parallel and Distributed Computer Systems., 1996

Performance Evaluation of a Massively Parallel I/O Subsystem.
Proceedings of the Input/Output in Parallel and Distributed Computer Systems., 1996

1995
Efficient Stack Simulation for Set-Associative Virtual Address Cache with Real Tags.
IEEE Trans. Computers, 1995

Parallel I/O subsystems in massively parallel supercomputers.
IEEE P&DT, 1995

Parallel File Systems for the IBM SP Computers.
IBM Systems Journal, 1995

Timestamp consistency and trace-driven analysis for distributed parallel systems.
Proceedings of IPPS '95, 1995

Performance Evaluation of a Parallel I/O Architecture.
Proceedings of the 9th international conference on Supercomputing, 1995

1994
Performance evaluation of a massively parallel I/O subsystem.
SIGARCH Computer Architecture News, 1994

Are We Providing the Right Education for Computer Science/Engineering Students?
Proceedings of the Proceedings 1994 International Conference on Parallel and Distributed Systems, 1994

1993
A Quantitative Evaluation of Cache Types for High-Performance Computer Systems.
IEEE Trans. Computers, 1993

Efficient Stack Simulation for Shared Memory Set-Associative Multiprocessor Caches.
Proceedings of the 1993 International Conference on Parallel Processing, 1993

1992
Stack simulation for set-associative V/R-type caches.
Proceedings of the Sixteenth Annual International Computer Software and Applications Conference, 1992

1991
The Effects of Network Delays on the Performance of MIN-Based Cache Coherence Protocols.
Proceedings of the International Conference on Parallel Processing, 1991

1990
A trace-driven analysis of the 'wrap-around' network.
Proceedings of the 1990 IEEE International Conference on Computer Design: VLSI in Computers and Processors, 1990

A Design of Performance-optimized Control-based Synchronization.
Proceedings of the CONPAR 90, 1990


  Loading...