Yi-Chung Wu

Orcid: 0000-0002-8774-623X

According to our database1, Yi-Chung Wu authored at least 17 papers between 2016 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of five.

Timeline

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Links

On csauthors.net:

Bibliography

2023
An FM-Index Based High-Throughput Memory-Efficient FPGA Accelerator for Paired-End Short-Read Mapping.
IEEE Trans. Biomed. Circuits Syst., December, 2023

A Fully Integrated End-to-End Genome Analysis Accelerator for Next-Generation Sequencing.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023

2022
Achieving Accurate Automatic Sleep Apnea/Hypopnea Syndrome Assessment Using Nasal Pressure Signal.
IEEE J. Biomed. Health Informatics, 2022

A 44.3mW 62.4fps Hyperspectral Image Processor for MAV Remote Sensing.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

2021
A 975-mW Fully Integrated Genetic Variant Discovery System-on-Chip in 28 nm for Next-Generation Sequencing.
IEEE J. Solid State Circuits, 2021

2020
A Generic Framework for Fourier-Domain Optical Coherence Tomography Imaging: Software Architecture and Hardware Implementations.
IEEE Access, 2020

A 1.96 Gb/s Massive MU-MIMO Detector for Next-Generation Cellular Systems.
Proceedings of the IEEE Symposium on VLSI Circuits, 2020

21.1 A Fully Integrated Genetic Variant Discovery SoC for Next-Generation Sequencing.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020

2019
Design and In Vivo Verification of a CMOS Bone-Guided Cochlear Implant Microsystem.
IEEE Trans. Biomed. Eng., 2019

A 12.6 mW, 573-2901 kS/s Reconfigurable Processor for Reconstruction of Compressively Sensed Physiological Signals.
IEEE J. Solid State Circuits, 2019

A 2.25 TOPS/W Fully-Integrated Deep CNN Learning Processor with On-Chip Training.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2019

2018
A 12.6MW 573-2, 901KS/S Reconfigurable Processor for Reconstruction of Compressively-Sensed Phvsiological Signals.
Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018

2017
A 135-mW Fully Integrated Data Processor for Next-Generation Sequencing.
IEEE Trans. Biomed. Circuits Syst., 2017

14.8 A 135mW fully integrated data processor for next-generation sequencing.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

Integration of energy-recycling logic and wireless power transfer for ultra-low-power implantables.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

2016
Comparative study of singing voice detection methods.
Multim. Tools Appl., 2016

sBWT: memory efficient implementation of the hardware-acceleration-friendly Schindler transform for the fast biological sequence mapping.
Bioinform., 2016


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