Chenyang Li

According to our database, Chenyang Li authored at least 15 papers between 2017 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

Review of recent progress on solid-state millimeter-wave and terahertz signal sources.

Yiqian Shan, Yuan Liang, Chenyang Li, Weifeng Sun, Zhongyuan Fang

Int. J. Circuit Theory Appl., January, 2024

2022

A Hybrid Coupler-First 5GHz Noise-Cancelling Dual-Mode Receiver with +10dBm in-Band IIP3 in Current-Mode and 1.7dB NF in Voltage-Mode.

Kaituo Yang, Chirn Chye Boon, Zhe Liu, Jiaming Piao, Ting Guo, Yangtao Dong, Chenyang Li, Ao Zhou, Zhijie Yang, Xiaoying Wang, Yufeng Liu

Proceedings of the IEEE International Solid-State Circuits Conference, 2022

A 0.0078mm2 3.4mW Wideband Positive-feedback-Based Noise-Cancelling LNA in 28nm CMOS Exploiting G_m Boosting.

Zhe Liu, Chirn Chye Boon, Chenyang Li, Kaituo Yang, Yangtao Dong, Ting Guo

Proceedings of the IEEE International Solid-State Circuits Conference, 2022

2021

A Bidirectional Nonlinearly Coupled QVCO With Passive Phase Interpolation for Multiphase Signals Generation.

Yangtao Dong, Chirn Chye Boon, Xin Ding, Chenyang Li, Zhe Liu

IEEE Trans. Very Large Scale Integr. Syst., 2021

A Parallel Sliding-IF Receiver Front-End With Sub-2-dB Noise Figure for 5-6-GHz WLAN Carrier Aggregation.

Kaituo Yang, Xiang Yi, Chirn Chye Boon, Zhipeng Liang, Guangyin Feng, Chenyang Li, Bei Liu

IEEE J. Solid State Circuits, 2021

A 1.75dB-NF 25mW 5GHz Transformer-Based Noise- Cancelling CMOS Receiver Front-End.

Kaituo Yang, Chirn Chye Boon, Guangyin Feng, Chenyang Li, Zhe Liu, Ting Guo, Xiang Yi, Yangtao Dong, Ao Zhou, Xiaoying Wang

Proceedings of the IEEE International Solid-State Circuits Conference, 2021

2020

Design of a Wideband Variable-Gain Amplifier With Self-Compensated Transistor for Accurate dB-Linear Characteristic in 65 nm CMOS Technology.

Lingshan Kong, Hang Liu, Xi Zhu, Chirn Chye Boon, Chenyang Li, Zhe Liu, Kiat Seng Yeo

IEEE Trans. Circuits Syst., 2020

Compact Switched-Capacitor Power Detector With Frequency Compensation in 65-nm CMOS.

Chenyang Li, Chirn Chye Boon, Xiang Yi, Zhipeng Liang, Kaituo Yang

IEEE Access, 2020

Multi-Channel FSK Inter/Intra-Chip Communication by Exploiting Field-Confined Slow-Wave Transmission Line.

Qian Chen, Chirn Chye Boon, Xueyong Zhang, Chenyang Li, Yuan Liang, Zhe Liu, Ting Guo

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2019

Design and Analysis of $D$ -Band On-Chip Modulator and Signal Source Based on Split-Ring Resonator.

Yuan Liang, Chirn Chye Boon, Chenyang Li, Xiao-Lan Tang, Herman Jalli Ng, Dietmar Kissinger, Yong Wang, Qingfeng Zhang, Hao Yu

IEEE Trans. Very Large Scale Integr. Syst., 2019

A 0.044-mm² 0.5-to-7-GHz Resistor-Plus-Source-Follower-Feedback Noise-Cancelling LNA Achieving a Flat NF of 3.3±0.45 dB.

Haohong Yu, Yong Chen, Chirn Chye Boon, Chenyang Li, Pui-In Mak, Rui Paulo Martins

IEEE Trans. Circuits Syst. II Express Briefs, 2019

A Low-Noise, Positive-Input, Negative-Output Voltage Generator for Low-to-Moderate Driving Capacity Applications.

Devrishi Khanna, Chirn Chye Boon, Pilsoon Choi, Liter Siek, Bei Liu, Chenyang Li

IEEE Trans. Circuits Syst. I Regul. Pap., 2019

A 24/77 GHz Dual-Band Receiver for Automotive Radar Applications.

Xiang Yi, Guangyin Feng, Zhipeng Liang, Cheng Wang, Bei Liu, Chenyang Li, Kaituo Yang, Chirn Chye Boon, Quan Xue

IEEE Access, 2019

2018

D-Band Surface-Wave Modulator and Signal Source with 40 dB Extinction Ratio and 3.7mW Output Power in 65 nm CMOS.

Yuan Liang, Hao Yu, Chirn Chye Boon, Chenyang Li, Dietmar Kissinger, Yong Wang

Proceedings of the 44th IEEE European Solid State Circuits Conference, 2018

2017

Pole-Converging Intrastage Bandwidth Extension Technique for Wideband Amplifiers.

Guangyin Feng, Chirn Chye Boon, Fanyi Meng, Xiang Yi, Kaituo Yang, Chenyang Li, Howard C. Luong

IEEE J. Solid State Circuits, 2017