Chi-Sheng Lin

According to our database1, Chi-Sheng Lin authored at least 21 papers between 2002 and 2016.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
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Links

On csauthors.net:

Bibliography

2016
Simultaneous and Anonymous Mobile Network Authentication Scheme Based on Chaotic Maps.
Inf. Technol. Control., 2016

2013
Performance evaluations of channel estimations in IEEE 802.11p environments.
Telecommun. Syst., 2013

Vibration Analysis of Composite Laminate Plate Excited by Piezoelectric Actuators.
Sensors, 2013

Physical-layer transceiving techniques on data-aided orthogonal frequency-division multiplexing towards seamless service on vehicular communications.
IET Commun., 2013

2012
Wireless communication performance based on IEEE 802.11p R2V field trials.
IEEE Commun. Mag., 2012

2011
A 5.5-GHz 1-mW Full-Modulus-Range Programmable Frequency Divider in 90-nm CMOS Process.
IEEE Trans. Circuits Syst. II Express Briefs, 2011

A 0.5V 1KS/s 2.5nW 8.52-ENOB 6.8fJ/conversion-step SAR ADC for biomedical applications.
Proceedings of the 2011 IEEE Custom Integrated Circuits Conference, 2011

2010
Deflection of Cross-Ply Composite Laminates Induced by Piezoelectric Actuators.
Sensors, 2010

Novel Channel Estimation Techniques in IEEE 802.11p Environments.
Proceedings of the 71st IEEE Vehicular Technology Conference, 2010

An effective phase detector for phase-locked loops with wide capture range and fast acquisition time.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

High-speed and low-power programmable frequency divider.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

Improved time-domain channel estimation techniques in IEEE 802.11p environments.
Proceedings of the 7th International Symposium on Communication Systems Networks and Digital Signal Processing, 2010

2009
An Edge Missing Compensator for Fast Settling Wide Locking Range Phase-Locked Loops.
IEEE J. Solid State Circuits, 2009

An edge-missing compensator for fast-settling wide-locking-range PLLs.
Proceedings of the IEEE International Solid-State Circuits Conference, 2009

2006
A CAM/WTA-Based High Speed and Low Power Longest Prefix Matching Circuit Design.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006

2004
A low-power rail-to-rail 6-bit flash ADC based on a novel complementary average-value approach.
Proceedings of the 2004 International Symposium on Low Power Electronics and Design, 2004

2003
A new successive approximation architecture for low-power low-cost CMOS A/D converter.
IEEE J. Solid State Circuits, 2003

A low-power precomputation-based fully parallel content-addressable memory.
IEEE J. Solid State Circuits, 2003

Low-power and low-voltage fully parallel content-addressable memory.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

2002
A scalable sorting architecture based on maskable WTA/MAX circuit.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

Design of a pipelined and expandable sorting architecture with simple control scheme.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002


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