Chiara Boffino

According to our database1, Chiara Boffino authored at least 6 papers between 2004 and 2019.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2019
A read/write front-end for an antifuse One-Time-Programmable memory in High Voltage Silicon-On-Insulator technology.
Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019

2007
Staircase-down SET programming approach for phase-change memories.
Microelectron. J., 2007

2006
A low-ripple voltage tripler.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

2005
4-Mb MOSFET-selected μtrench phase-change memory experimental chip.
IEEE J. Solid State Circuits, 2005

High-efficiency control structure for CMOS flash memory charge pumps.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2004


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