Roberto Bez

According to our database1, Roberto Bez authored at least 10 papers between 1997 and 2012.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2012
Emerging memory technology perspective.
Proceedings of Technical Program of 2012 VLSI Design, Automation and Test, 2012

"Phase-Change Memories for nano-scale technology and design".
Proceedings of the IEEE International Conference on IC Design & Technology, 2012

2011
A 4 Mb LV MOS-Selected Embedded Phase Change Memory in 90 nm Standard CMOS Technology.
IEEE J. Solid State Circuits, 2011

2010
A 90nm 4Mb embedded phase-change memory with 1.2V 12ns read access time and 1MB/s write throughput.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010

2008
Program circuit for a phase change memory array with 2 MB/s write throughput for embedded applications.
Proceedings of the ESSCIRC 2008, 2008

2005
4-Mb MOSFET-selected μtrench phase-change memory experimental chip.
IEEE J. Solid State Circuits, 2005

2004

2003
Introduction to flash memory.
Proc. IEEE, 2003

2000
40-mm<sup>2</sup> 3-V-only 50-MHz 64-Mb 2-b/cell CHE NOR flash memory.
IEEE J. Solid State Circuits, 2000

1997
Flash memory cells-an overview.
Proc. IEEE, 1997


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