Chien-Chia Huang

According to our database, Chien-Chia Huang authored at least 5 papers between 2017 and 2019.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2019

An Efficient Learning-based Approach for Performance Exploration on Analog and RF Circuit Synthesis.

Po-Cheng Pan, Chien-Chia Huang, Hung-Ming Chen

Proceedings of the 56th Annual Design Automation Conference 2019, 2019

2018

A learning-based methodology for routability prediction in placement.

Li-Chin Chen, Chien-Chia Huang, Yao-Lin Chang, Hung-Ming Chen

Proceedings of the 2018 International Symposium on VLSI Design, 2018

On Closing the Gap Between Pre-Simulation and Post-Simulation Results in Nanometer Analog Layouts.

Po-Cheng Pan, Hung-Wen Huang, Chien-Chia Huang, Abhishek Patyal, Hung-Ming Chen, Tsun-Yu Yang

Proceedings of the 15th International Conference on Synthesis, 2018

2017

On Tolerating Faults of TSV/Microbumps for Power Delivery Networks in 3D IC.

Sheng-Hsin Fang, Chang-Tzu Lin, Wei-Hsun Liao, Chien-Chia Huang, Li-Chin Chen, Hung-Ming Chen, I-Hsuan Lee, Ding-Ming Kwai, Yung-Fa Chou

Proceedings of the 2017 IEEE Computer Society Annual Symposium on VLSI, 2017

Heterogeneous chip power delivery modeling and co-synthesis for practical 3DIC realization.

Wei-Hsun Liao, Chang-Tzu Lin, Sheng-Hsin Fang, Chien-Chia Huang, Hung-Ming Chen, Ding-Ming Kwai, Yung-Fa Chou

Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017