Po-Cheng Pan
Orcid: 0000-0002-8626-1249
According to our database1,
Po-Cheng Pan
authored at least 13 papers
between 2009 and 2020.
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Bibliography
2020
Exploring Multiple Analog Placements With Partial-Monotonic Current Paths and Symmetry Constraints Using PCP-SP.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
2019
An Efficient Learning-based Approach for Performance Exploration on Analog and RF Circuit Synthesis.
Proceedings of the 56th Annual Design Automation Conference 2019, 2019
2018
On Closing the Gap Between Pre-Simulation and Post-Simulation Results in Nanometer Analog Layouts.
Proceedings of the 15th International Conference on Synthesis, 2018
Proceedings of the 55th Annual Design Automation Conference, 2018
2015
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015
Proceedings of the 23rd Annual ACM Conference on Multimedia Conference, MM '15, Brisbane, Australia, October 26, 2015
2014
An automatic synthesis tool for nanometer low dropout regulator using simulation based model and geometric programming.
Proceedings of the Technical Papers of 2014 International Symposium on VLSI Design, 2014
2013
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2013
PAGE: parallel agile genetic exploration towards utmost performance for analog circuit design.
Proceedings of the Design, Automation and Test in Europe, 2013
2012
Configurable analog routing methodology via technology and design constraint unification.
Proceedings of the 2012 IEEE/ACM International Conference on Computer-Aided Design, 2012
2011
Integrated hierarchical synthesis of analog/RF circuits with accurate performance mapping.
Proceedings of the 12th International Symposium on Quality Electronic Design, 2011
Proceedings of the 2011 IEEE/ACM International Conference on Computer-Aided Design, 2011
2009
Proceedings of the 19th ACM Great Lakes Symposium on VLSI 2009, 2009