Chih-Feng Li

According to our database, Chih-Feng Li authored at least 3 papers between 2005 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

15.7 A 32Mb RRAM in a 12nm FinFet Technology with a 0.0249μm² Bit-Cell, a 3.2GB/S Read Throughput, a 10KCycle Write Endurance and a 10-Year Retention at 105°C.

Yi-Cheng Huang, Shang-Hsuan Liu, Hsu-Shun Chen, Hsin-Chang Feng, Chih-Feng Li, Chou-Ying Yang, Wei-Keng Chang, Chang-Feng Yang, Chun-Yu Wu, Yen-Cheng Lin, Tsung-Tse Yang, Chih-Yang Chang, Wen-Ting Chu, Harry Chuang, Yih Wang, Yu-Der Chih, Tsung-Yung Jonathan Chang

Proceedings of the IEEE International Solid-State Circuits Conference, 2024

2018

An N40 256K×44 embedded RRAM macro with SL-precharge SA and low-voltage current limiter to improve read and write performance.

Chung-Cheng Chou, Zheng-Jun Lin, Pei-Ling Tseng, Chih-Feng Li, Chih-Yang Chang, Wei-Chi Chen, Yu-Der Chih, Tsung-Yung Jonathan Chang

Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

2005

On-chip accumulated jitter measurement for phase-locked loops.

Chih-Feng Li, Shao-Sheng Yang, Tsin-Yuan Chang

Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005