Chih-Peng Fan

Orcid: 0000-0002-0585-975X

According to our database1, Chih-Peng Fan authored at least 72 papers between 1997 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
Calibration-Free Gaze Estimation by Combination with Hand and Facial Features Detection for Interactive Advertising Display.
Proceedings of the IEEE International Conference on Consumer Electronics, 2024

A Hand Gesture Exergame for Dementia Development Suppression and Its Applications to Elders.
Proceedings of the IEEE International Conference on Consumer Electronics, 2024

2023
Extensions of Exercise and Performance Learning Assistant System for Usability Improvements.
J. Softw., November, 2023

Design and Implementation of Image-Sensing Based Learning Assistant System for Self-Practice Dynamic Yoga on Embedded GPU Device.
Proceedings of the IEEE International Conference on Consumer Electronics, 2023

YOLO Deep-Learning Based Driver Behaviors Detection and Effective Gaze Estimation by Head Poses for Driver Monitor System.
Proceedings of the 12th IEEE Global Conference on Consumer Electronics, 2023

A Study of Hand Gesture Exergame for Dementia Development Suppression.
Proceedings of the 12th IEEE Global Conference on Consumer Electronics, 2023

OpenPose Based Yoga Poses Difficulty Estimation for Dynamic and Static Yoga Exercises.
Proceedings of the Asia Pacific Signal and Information Processing Association Annual Summit and Conference, 2023

2022
Design and FPGA Implementation of Lite Convolutional Neural Network Based Hardware Accelerator for Ocular Biometrics Recognition Technology.
Proceedings of the 15th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2022

Acceleration Study of Two-Stage and Deep-Learning Based Facial Direction Detection on GPU-Based Edge Device.
Proceedings of the 4th IEEE Global Conference on Life Sciences and Technologies, 2022

YOLO-Based Deep Learning Design for In-Cabin Monitoring System with Fisheye-Lens Camera.
Proceedings of the IEEE International Conference on Consumer Electronics, 2022

Quantized Lite Convolutional Neural Network Hardware Accelerator Design with FPGA for Face Direction Recognition.
Proceedings of the IEEE International Conference on Consumer Electronics - Taiwan, 2022

An Implementation of Exercise and Performance Learning Assistant System Platform Using Node.js.
Proceedings of the IEEE International Conference on Consumer Electronics - Taiwan, 2022

Age Group Classifier of Adults and Children with YOLO-based Deep Learning Pre-Processing Scheme for Embedded Platforms.
Proceedings of the 12th IEEE International Conference on Consumer Electronics, 2022

Design of OpenPose-Based of Exercise Assistant System with Instructor-User Synchronization for Self-Practice Dynamic Yoga.
Proceedings of the 10th International Conference on Computer and Communications Management, 2022

Detection of Facial Directions and Features With YOLO-Based Deep-Learning Technology for Pre-Processing of Gaze Estimation.
Proceedings of the 11th IEEE Global Conference on Consumer Electronics, 2022

2021
Design and Implementation of LoRa-Based Wireless Sensor Network with Embedded System for Smart Agricultural Recycling Rapid Processing Factory.
IEICE Trans. Inf. Syst., 2021

Iris Location and Recognition by Deep-Learning Networks Based Design for Biometric Authorization.
Proceedings of the 3rd IEEE Global Conference on Life Sciences and Technologies, 2021

Sensor Data Fusion of Intelligent Autonomous Mover for Object Detection and Collision Avoidance in Environments with Surrounding Crowds.
Proceedings of the IEEE International Conference on Consumer Electronics, 2021

Effective Two-Stage Processing Based Lite Deep Learning Classifier for Gender Detection.
Proceedings of the IEEE International Conference on Consumer Electronics-Taiwan, 2021

An OpenPose-Based Exercise and Performance Learning Assistant Design for Self-Practice Yoga.
Proceedings of the 10th IEEE Global Conference on Consumer Electronics, 2021

iAMEC, an Intelligent Autonomous Mover for Navigation in Indoor People Rich Environments.
Proceedings of the 3rd IEEE International Conference on Artificial Intelligence Circuits and Systems, 2021

2020
Prototype of Low Complexity CNN Hardware Accelerator with FPGA-based PYNQ Platform for Dual-Mode Biometrics Recognition.
Proceedings of the International SoC Design Conference, 2020

Design and Implementation of Deep Learning Based Pupil Tracking Technology for Application of Visible-Light Wearable Eye Tracker.
Proceedings of the 2020 IEEE International Conference on Consumer Electronics (ICCE), 2020

Biometric Authentication with Combined Iris and Sclera Information by YOLO-based Deep-Learning Network.
Proceedings of the IEEE International Conference on Consumer Electronics - Taiwan, 2020

Design of Low-Complexity YOLOv3-Based Deep-Learning Networks with Joint Iris and Sclera Messages for Biometric Recognition Application.
Proceedings of the 9th IEEE Global Conference on Consumer Electronics, 2020

2019
The IEEE International Conference on Consumer Electronics-Taiwan 2018 [Conference Reports].
IEEE Consumer Electron. Mag., 2019

VLSI Implementation of K-Best MIMO Detector with Cost-Effective Pre-screening and Fast Sorting Design.
Proceedings of the Advances in Networked-based Information Systems, 2019

Effective Marker and IMU Based Calibration for Head Movement Compensation of Wearable Gaze Tracking.
Proceedings of the IEEE International Conference on Consumer Electronics, 2019

Cost-Efficient Adaboost-based Face Detection with FPGA Hardware Accelerator.
Proceedings of the IEEE International Conference on Consumer Electronics - Taiwan, 2019

Deep-Learning Based Pedestrian Direction Detection for Anti-collision of Intelligent Self-propelled Vehicles.
Proceedings of the IEEE 8th Global Conference on Consumer Electronics, 2019

SIFT Features and SVM Learning based Sclera Recognition Method with Efficient Sclera Segmentation for Identity Identification.
Proceedings of the IEEE International Conference on Artificial Intelligence Circuits and Systems, 2019

2018
Visible-light wearable eye gaze tracking by gradients-based eye center location and head movement compensation with IMU.
Proceedings of the IEEE International Conference on Consumer Electronics, 2018

Sclera Recognition by Density Sampling Features Based Vascular Structure Rapid Matching for Identity Identification.
Proceedings of the IEEE 7th Global Conference on Consumer Electronics, 2018

2017
Visible-light based gaze tracking with image enhancement pre-processing for wearable eye trackers.
Proceedings of the IEEE 6th Global Conference on Consumer Electronics, 2017

NIR-based gaze tracking with fast pupil ellipse fitting for real-time wearable eye trackers.
Proceedings of the IEEE Conference on Dependable and Secure Computing, 2017

2016
A Fast Algorithm-Based Cost-Effective and Hardware-Efficient Unified Architecture Design of 4 × 4, 8 × 8, 16 × 16, and 32 × 32 Inverse Core Transforms for HEVC.
J. Signal Process. Syst., 2016

Fast ellipse fitting based pupil tracking design for human-computer interaction applications.
Proceedings of the IEEE International Conference on Consumer Electronics, 2016

Fast iris ellipse fitting based gaze tracking with visible light for real-time wearable eye trackers.
Proceedings of the IEEE 5th Global Conference on Consumer Electronics, 2016

Near-infrared-ray and side-view video based drowsy driver detection system: Whether or not wearing glasses.
Proceedings of the 2016 IEEE Asia Pacific Conference on Circuits and Systems, 2016

High-efficiency and cost-sharing architecture design of fast algorithm based multiple 4×4 and 8×8 forward transforms for multi-standard video encoder.
Proceedings of the 2016 IEEE Asia Pacific Conference on Circuits and Systems, 2016

2015
Design and VLSI implementation of novel pre-screening and simplified sorting based K-best detection for MIMO systems.
Proceedings of the VLSI Design, Automation and Test, 2015

Intelligent video-based drowsy driver detection system under various illuminations and embedded software implementation.
Proceedings of the IEEE International Conference on Consumer Electronics - Taiwan, 2015

Design and analyses of joint carrier recovery and fast convergence generalized multi-modulus decision-feedback blind equalizer for 1024QAM cable receivers.
Proceedings of the IEEE International Conference on Consumer Electronics - Taiwan, 2015

2014
Cost-Effective Hardware-Sharing Design of Fast Algorithm Based Multiple Forward and Inverse Transforms for H.264/AVC, MPEG-1/2/4, AVS, and VC-1 Video Encoding and Decoding Applications.
IEEE Trans. Circuits Syst. Video Technol., 2014

A high throughput CAVLC architecture design with two-path parallel coefficients procedure for digital cinema 4K resolution H.264/AVC encoding.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

High-efficiency multiple 4×4 and 8×8 inverse transform design with a cost-effective unified architecture for multistandard video decoders.
Proceedings of the 2014 IEEE Asia Pacific Conference on Circuits and Systems, 2014

2013
Efficient decision feedback blind equalizer with multi-level modulus algorithm and two-stage feedback scheme for high-order QAM cable receivers.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2013

VLSI design of Extreme Value Detection based fast algorithm for H.264/AVC intra prediction.
Proceedings of the 9th International Conference on Information, 2013

2012
Absolute Difference and Low-Power Bus Encoding Method for LCD Digital Display Interfaces.
VLSI Design, 2012

2011
Fast Multiple Inverse Transforms With Low-Cost Hardware Sharing Design for Multistandard Video Decoding.
IEEE Trans. Circuits Syst. II Express Briefs, 2011

Efficient RC low-power bus encoding methods for crosstalk reduction.
Integr., 2011

Efficient Mode Selection with BMA Based Pre-processing Algorithms for H.264/AVC Fast Intra Mode Decision.
Proceedings of the Advances in Multimedia Modeling, 2011

2010
Design and analyses of a fast feed-forward blind equalizer with two-stage generalized multilevel modulus and soft decision-directed scheme for high-order QAM cable downstream receivers.
IEEE Trans. Consumer Electron., 2010

2009
Efficient Fast 1-D 8×8 Inverse Integer Transform for VC-1 Application.
IEEE Trans. Circuits Syst. Video Technol., 2009

Fast Algorithm and Low-Cost Hardware-Sharing Design of Multiple Integer Transforms for VC-1.
IEEE Trans. Circuits Syst. II Express Briefs, 2009

Low-Power Instruction Address Bus Coding with Xor-bits Architecture.
J. Circuits Syst. Comput., 2009

2008
Low-Cost Hardware-Sharing Architecture of Fast 1-D Inverse Transforms for H.264/AVC and AVS Applications.
IEEE Trans. Circuits Syst. II Express Briefs, 2008

Efficient Low-Cost Sharing Design of Fast 1-D Inverse Integer Transform Algorithms for H.264/AVC and VC-1.
IEEE Signal Process. Lett., 2008

Fast blind equalization with two-stage single/multilevel modulus and DD algorithm for high order QAM cable systems.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

Cost effective hardware sharing architecture for fast 1-D 8×8 forward and inverse integer transforms of H.264/AVC high profile.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008

Architecture design of low-power and low-cost CAVLC decoder for H.264/AVC.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008

2007
Pruning fast Fourier transform algorithm design using group-based method.
Signal Process., 2007

Implementations of Low-Cost Hardware Sharing Architectures for Fast 8 x 8 and 4 x 4 Integer Transforms in H.264/AVC.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2007

2006
Fast 2-dimensional 4 × 4 forward integer transform implementation for H.264/AVC.
IEEE Trans. Circuits Syst. II Express Briefs, 2006

Fast 2-Dimensional 8x8 Integer Transform Algorithm Design for H.264/AVC Fidelity Range Extensions.
IEICE Trans. Inf. Syst., 2006

A Grouped Fast Fourier Transform Algorithm Design For Selective Transformed Outputs.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006

A Low Multiplier and Multiplication Costs 256-point FFT Implementation with Simplified Radix-24 SDF Architecture.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006

Cost-Effective Hardware Sharing Architectures of Fast 8×8 and 4×4 Integer Transforms for H.264/AVC.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006

2005
Fast Algorithm Designs for Low-Complexity 4 x 4 Discrete Cosine Transform.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2005

2003
An adaptive carrier synchronizer for M-QAM cable receiver.
IEEE Trans. Consumer Electron., 2003

2000
MPEG-4 video bitstream structure analysis and its parsing architecture design.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

1997
Fixed-Pipeline Two-Dimensional Hadamard Transform Algorithms.
IEEE Trans. Signal Process., 1997


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