Jiun-In Guo
Orcid: 0000-0003-0402-2621
According to our database1,
Jiun-In Guo
authored at least 159 papers
between 1992 and 2024.
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Bibliography
2024
Object Detection, Recognition, and Tracking Algorithms for ADASs - A Study on Recent Trends.
Sensors, 2024
2023
Deep Learning Derived Object Detection and Tracking Technology Based on Sensor Fusion of Millimeter-Wave Radar/Video and Its Application on Embedded Systems.
Sensors, March, 2023
360° Map Establishment and Real-Time Simultaneous Localization and Mapping Based on Equirectangular Projection for Autonomous Driving Vehicles.
Sensors, 2023
Summary of the 2023 PAIR-LITEON Competition: Embedded AI Object Detection Model Design Contest on Fish-eye Around-view Cameras.
Proceedings of the ACM Multimedia Asia 2023, 2023
Proceedings of the 32nd IEEE International Symposium on Industrial Electronics, 2023
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023
Summary of the 2023 Low-Power Deep Learning Object Detection and Semantic Segmentation Multitask Model Compression Competition for Traffic Scene in Asian Countries.
Proceedings of the IEEE International Conference on Multimedia and Expo Workshops, 2023
YOLO Deep-Learning Based Driver Behaviors Detection and Effective Gaze Estimation by Head Poses for Driver Monitor System.
Proceedings of the 12th IEEE Global Conference on Consumer Electronics, 2023
2022
IEEE Trans. Neural Networks Learn. Syst., 2022
ConcentrateNet: Multi-Scale Object Detection Model for Advanced Driving Assistance System Using Real-Time Distant Region Locating Technique.
Sensors, 2022
iVS Dataset and ezLabel: A Dataset and a Data Annotation Tool for Deep Learning Based ADAS Applications.
Remote. Sens., 2022
Real-Time Multiple Pedestrian Tracking With Joint Detection and Embedding Deep Learning Model for Embedded Systems.
IEEE Access, 2022
Proceedings of the IEEE Sensors Applications Symposium, 2022
Summary of the 2022 Low-Power Deep Learning Semantic Segmentation Model Compression Competition for Traffic Scene In Asian Countries.
Proceedings of the IEEE International Conference on Multimedia and Expo Workshops, 2022
Proceedings of the 4th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2022
2021
IEEE Access, 2021
High-Power and High-Responsivity Avalanche Photodiodes for Self-Heterodyne FMCW Lidar System Applications.
IEEE Access, 2021
Summary of the 2021 Embedded Deep Learning Object Detection Model Compression Competition for Traffic in Asian Countries.
Proceedings of the ICMR '21: International Conference on Multimedia Retrieval, 2021
Proceedings of the 30th IEEE International Symposium on Industrial Electronics, 2021
Focal-Balanced Attention U-Net with Dynamic Thresholding by Spatial Regression for Segmentation of Aortic Dissection in CT Imagery.
Proceedings of the 18th IEEE International Symposium on Biomedical Imaging, 2021
AI-Assisted Stanford Classification of Aortic Dissection in CT Imaging Using Volumetric 3D CNN with External Guided Attention.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, BioCAS 2021, 2021
2020
A Deep-Learning Model with Task-Specific Bounding Box Regressors and Conditional Back-Propagation for Moving Object Detection in ADAS Applications.
Sensors, 2020
Hybrid Fixed-Point/Binary Deep Neural Network Design Methodology for Low-Power Object Detection.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2020
Video Dehazing Hardware Accelerator Design based on Dark Channel Prior with Sky Preservation.
Proceedings of the 2020 International Symposium on VLSI Design, Automation and Test, 2020
Low-Power 3D-PCB Stacking System Design and Validation by Automatic Voltage-Current Scalable Technique.
Proceedings of the 2020 International Symposium on VLSI Design, Automation and Test, 2020
Front Moving Object Behavior Prediction System Exploiting Deep Learning Technology for ADAS Applications.
Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020
Proceedings of the 29th IEEE International Symposium on Industrial Electronics, 2020
The 2020 Embedded Deep Learning Object Detection Model Compression Competition for Traffic in Asian Countries.
Proceedings of the 2020 IEEE International Conference on Multimedia & Expo Workshops, 2020
Fusion Technology of Radar and RGB Camera Sensors for Object Detection and Tracking and its Embedded System Implementation.
Proceedings of the Asia-Pacific Signal and Information Processing Association Annual Summit and Conference, 2020
2019
Pvalite CLN: Lightweight Object Detection with Classfication and Localization Network.
Proceedings of the 32nd IEEE International System-on-Chip Conference, 2019
Proceedings of the 21st IEEE International Workshop on Multimedia Signal Processing, 2019
Proceedings of the 2019 IEEE International Conference on Image Processing, 2019
Proceedings of the 2019 IEEE International Conference on Image Processing, 2019
Proceedings of the 2019 Asia-Pacific Signal and Information Processing Association Annual Summit and Conference, 2019
2018
A Blind Spot Detection Warning System based on Gabor Filtering and Optical Flow for E-mirror Applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Vehicle Detection and Classification based on Deep Neural Network for Intelligent Transportation Applications.
Proceedings of the Asia-Pacific Signal and Information Processing Association Annual Summit and Conference, 2018
One Stage Detection Network with an Auxiliary Classifier for Real-Time Road Marks Detection.
Proceedings of the Asia-Pacific Signal and Information Processing Association Annual Summit and Conference, 2018
2017
Proceedings of the 2017 International Symposium on VLSI Design, Automation and Test, 2017
An Adaptive Cross-Window stereo camera Distance Estimation technology and its system implementation for multiple applications.
Proceedings of the 2017 International Symposium on VLSI Design, Automation and Test, 2017
Embedded multiple object detection based on deep learning technique for advanced driver assistance system.
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017
Proceedings of the Computational Imaging XV, Burlingame, 2017
Proceedings of the 2017 Asia-Pacific Signal and Information Processing Association Annual Summit and Conference, 2017
Stop line detection and distance measurement for road intersection based on deep learning neural network.
Proceedings of the 2017 Asia-Pacific Signal and Information Processing Association Annual Summit and Conference, 2017
A multiple-lane vehicle tracking method for forward collision warning system applications.
Proceedings of the 2017 Asia-Pacific Signal and Information Processing Association Annual Summit and Conference, 2017
2016
Algorithm derivation and its embedded system realization of speed limit detection for multiple countries.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016
2015
A power-aware quad-voltage H.264 encoder chip for wireless panoramic endoscope applications.
Proceedings of the VLSI Design, Automation and Test, 2015
Proceedings of the VLSI Design, Automation and Test, 2015
A wireless panoramic endoscope system design and implementation for minimally invasive surgery.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
Proceedings of the IEEE International Conference on Consumer Electronics - Taiwan, 2015
Proceedings of the IEEE International Conference on Consumer Electronics - Taiwan, 2015
2014
Proceedings of the Technical Papers of 2014 International Symposium on VLSI Design, 2014
Proceedings of the IEEE International Conference on Consumer Electronics - Taiwan, 2014
An Adaboost-based two-level moving object detection architecture with dynamic ROI allocation.
Proceedings of the IEEE International Conference on Consumer Electronics - Taiwan, 2014
Vision-based moving objects detection for intelligent automobiles and a robustness enhancing method.
Proceedings of the IEEE International Conference on Consumer Electronics - Taiwan, 2014
Dynamic local contrast enhancement for advanced driver assistance system in harsh environments.
Proceedings of the IEEE International Conference on Consumer Electronics - Taiwan, 2014
Proceedings of the IEEE International Conference on Consumer Electronics - Taiwan, 2014
A single-camera high dynamic range technique by using contrast enhancement and exposure control.
Proceedings of the Asia-Pacific Signal and Information Processing Association Annual Summit and Conference, 2014
Proceedings of the Asia-Pacific Signal and Information Processing Association Annual Summit and Conference, 2014
2013
Real-Time 3D Depth Generation for Stereoscopic Video Applications with Thread-Level Superscalar-Pipeline Parallelization.
J. Signal Process. Syst., 2013
Proceedings of the 2013 International Symposium on VLSI Design, Automation, and Test, 2013
Proceedings of the 2013 International Symposium on VLSI Design, Automation, and Test, 2013
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013
Proceedings of the Asia-Pacific Signal and Information Processing Association Annual Summit and Conference, 2013
2012
High efficiency data access system architecture for deblocking filter supporting multiple video coding standards.
IEEE Trans. Consumer Electron., 2012
IEICE Trans. Inf. Syst., 2012
Proceedings of Technical Program of 2012 VLSI Design, Automation and Test, 2012
A high-speed dual-phase processing pipelined domino circuit design with a built-in performance adjusting mechanism.
Proceedings of Technical Program of 2012 VLSI Design, Automation and Test, 2012
Proceedings of the 2012 Visual Communications and Image Processing, 2012
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012
Proceedings of the Asia-Pacific Signal and Information Processing Association Annual Summit and Conference, 2012
2011
Design of Subthreshold SRAMs for Energy-Efficient Quality-Scalable Video Applications.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2011
Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011
Dual-phase pipeline circuit design automation with a built-in performance adjusting mechanism.
Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011
A H.264/MPEG-2 dual mode video decoder chip supporting temporal/spatial scalable video.
Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011
2010
J. Signal Process. Syst., 2010
A group of macroblock based motion estimation algorithm supporting adaptive search range for H.264 video coding.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
Low complexity fractional motion estimation with adaptive mode selection for H.264/AVC.
Proceedings of the 2010 IEEE International Conference on Multimedia and Expo, 2010
Proceedings of the 2010 IEEE International Conference on Multimedia and Expo, 2010
Dynamic voltage domain assignment technique for low power performance manageable cell based design.
Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010
2009
A 252Kgates/4.9Kbytes SRAM/71mW multistandard video decoder for high definition video applications.
ACM Trans. Design Autom. Electr. Syst., 2009
IEEE Trans. Circuits Syst. Video Technol., 2009
VisoMT: A Collaborative Multithreading Multicore Processor for Multimedia Applications With a Fast Data Switching Mechanism.
IEEE Trans. Circuits Syst. Video Technol., 2009
IEEE Trans. Circuits Syst. Video Technol., 2009
Proceedings of the Sixth International Conference on Information Technology: New Generations, 2009
A Low Complexity Error Concealment Method for H.264 Video Coding Facilitating Hardware Realization.
Proceedings of the 10th International Symposium on Pervasive Systems, 2009
A System Architecture Exploration on the Configurable HW/SW Co-design for H.264 Video Decoder.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009
A High Throughput Deblocking Filter Design Supporting Multiple Video Coding Standards.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009
Optimization of AVS-M Video Decoder for Real-time Implementation on Embedded RISC Processors.
Proceedings of the Fifth International Conference on Intelligent Information Hiding and Multimedia Signal Processing (IIH-MSP 2009), 2009
Proceedings of the 14th Asia South Pacific Design Automation Conference, 2009
Proceedings of the 14th Asia South Pacific Design Automation Conference, 2009
2008
Proceedings of the IEEE International Conference on Acoustics, 2008
Joint algorithm/code-level optimization of H.264 video decoder for mobile multimedia applications.
Proceedings of the IEEE International Conference on Acoustics, 2008
A novel basic unit level rate control algorithm and architecture for H.264/AVC video encoders.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008
A high throughput in-loop de-blocking filter supporting H.264/AVC BP/MP/HP video coding.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008
2007
IEEE J. Solid State Circuits, 2007
A Quality Scalable H.264/AVC Baseline Intra Encoder for High Definition Video Applicaitons.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2007
A 252kgate/71mW Multi-Standard Multi-Channel Video Decoder for High Definition Video Applications.
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007
A Memory-Based Hardware Accelerator for Real-Time MPEG-4 Audio Coding and Reverberation.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
A High-Speed/Low-Power Multiplier Using an Advanced Spurious Power Suppression Technique.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
Proceedings of the 2007 IEEE International Conference on Multimedia and Expo, 2007
Proceedings of the 2007 IEEE International Conference on Multimedia and Expo, 2007
Proceedings of the 44th Design Automation Conference, 2007
2006
An Area-Efficient Variable Length Decoder IP Core Design for MPEG-1/2/4 Video Coding Applications.
IEEE Trans. Circuits Syst. Video Technol., 2006
IEEE Trans. Circuits Syst. Video Technol., 2006
Design of customized functional units for the VLIW-based multi-threading processor core targeted at multimedia applications.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
A high performance CAVLC encoder design for MPEG-4 AVC/H.264 video coding applications.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
A performance-aware IP core design for multimode transform coding using scalable-DA algorithm.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
A High Throughput VLSI Architecture Design for H.264 Context-Based Adaptive Binary Arithmetic Decoding with Look Ahead Parsing.
Proceedings of the 2006 IEEE International Conference on Multimedia and Expo, 2006
Collaborative Multithreading: An Open Scalable Processor Architecture for Embedded Multimedia Applications.
Proceedings of the 2006 IEEE International Conference on Multimedia and Expo, 2006
Proceedings of the 2006 IEEE International Conference on Multimedia and Expo, 2006
Low Complexity Architecture Design of H.264 Predictive Pixel Compensator for HDTV Application.
Proceedings of the 2006 IEEE International Conference on Acoustics Speech and Signal Processing, 2006
A Low Complexity High Quality Interger Motion Estimation Architecture Design for H.264/AVC.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006
Low Complexity High Quality Fractional Motion Estimation Algorithm and Architecture Design for H.264/AVC.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006
2005
An Energy-Aware IP Core Design for the Variable-Length DCT/IDCT Targeting at MPEG4 Shape-Adaptive Transforms.
IEEE Trans. Circuits Syst. Video Technol., 2005
A memory-efficient realization of cyclic convolution and its application to discrete cosine transform.
IEEE Trans. Circuits Syst. Video Technol., 2005
The Long Length DHT Design with a New Hardware Efficient Distributed Arithmetic Approach and Cyclic Preserving Partitioning.
IEICE Trans. Electron., 2005
An efficient spurious power suppression technique (SPST) and its applications on MPEG-4 AVC/H.264 transform coding design.
Proceedings of the 2005 International Symposium on Low Power Electronics and Design, 2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
A novel low-cost high-performance VLSI architecture for MPEG-4 AVC/H.264 CAVLC decoding.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
2004
An efficient 2-D DCT/IDCT core design using cyclic convolution and adder-based realization.
IEEE Trans. Circuits Syst. Video Technol., 2004
A parameterized power-aware IP core generator for the 2-D 8×8 DCT/IDCT.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
A power-aware IP core design for the variable-length DCT/IDCT targeting at MPEG4 shape-adaptive transforms.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
A power-aware SNR-progressive DCT/IDCT IP core design for multimedia transform coding.
Proceedings of the 2004 IEEE International Conference on Multimedia and Expo, 2004
A high-performance MPEG4 bitstream processing core.
Proceedings of the 2004 IEEE International Conference on Multimedia and Expo, 2004
2003
J. VLSI Signal Process., 2003
Design and Realization of a New Signal Security System for Multimedia Data Transmission.
EURASIP J. Adv. Signal Process., 2003
A parameterized low power design for the variable-length discrete Fourier transform using dynamic pipelining.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003
A memory efficient realization of cyclic convolution and its application to discrete cosine transform.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003
2002
A Low-Power Parameterized Hardware Design for the One-Dimensional Discrete Fourier Transform of Variable Lengths.
J. Circuits Syst. Comput., 2002
Proceedings of the Advances in Multimedia Information Processing, 2002
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
A new group distributed arithmetic design for the one dimensional discrete Fourier transform.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
2001
A generalized architecture for the one-dimensional discrete cosine and sine transforms.
IEEE Trans. Circuits Syst. Video Technol., 2001
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001
2000
An efficient design for one-dimensional discrete Hartley transform using parallel additions.
IEEE Trans. Signal Process., 2000
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000
An efficient design for one dimensional discrete cosine transform using parallel adders.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000
1998
IEEE Trans. Neural Networks, 1998
1994
A General Approach to Design VLSI Arrays for the Multi-dimensional Discrete Hartley Transform.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994
A novel VLSI array design for the discrete Hartley transform using cyclic convolution.
Proceedings of ICASSP '94: IEEE International Conference on Acoustics, 1994
1993
IEEE Trans. Signal Process., 1993
A Multi-phase Shared Bus Structure for the Fast Fourier Transform.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993
A CORDIC-based VLSI Array for Computing 2-D Discrete Hartley Transform.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993
1992
Proceedings of the 1992 IEEE International Conference on Acoustics, 1992