Cho W. Moon

According to our database, Cho W. Moon authored at least 7 papers between 1991 and 2002.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2002

Timing model extraction of hierarchical blocks by graph reduction.

Cho W. Moon, Harish Kriplani, Krishna P. Belkhale

Proceedings of the 39th Design Automation Conference, 2002

1995

An efficient heuristic procedure for solving the state assignment problem for event-based specifications.

Luciano Lavagno, Cho W. Moon, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1995

1994

Specification, synthesis, and verification of hazard-free asynchronous circuits.

Cho W. Moon, Paul R. Stephan, Robert K. Brayton

J. VLSI Signal Process., 1994

1993

Elimination of Dynamic hazards by Factoring.

Cho W. Moon, Robert K. Brayton

Proceedings of the 30th Design Automation Conference. Dallas, 1993

1992

Sequential Circuit Design Using Synthesis and Optimization.

Ellen Sentovich, Kanwar Jit Singh, Cho W. Moon, Hamid Savoj, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli

Proceedings of the Proceedings 1992 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1992

Solving the State Assignment Problem for Signal Transition Graphs.

Luciano Lavagno, Cho W. Moon, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli

Proceedings of the 29th Design Automation Conference, 1992

1991

Synthesis of Hazard-Free Asynchronous Circuits from Graphical Specifications.

Cho W. Moon, Paul R. Stephan, Robert K. Brayton

Proceedings of the 1991 IEEE/ACM International Conference on Computer-Aided Design, 1991