Chun Chen

According to our database1, Chun Chen authored at least 18 papers between 2002 and 2013.

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Bibliography

2013
A script-based autotuning compiler system to generate high-performance CUDA code.
TACO, 2013

2012
Hierarchical parallelization and optimization of high-order stencil computations on multicore clusters.
The Journal of Supercomputing, 2012

Polyhedra scanning revisited.
Proceedings of the ACM SIGPLAN Conference on Programming Language Design and Implementation, 2012

Improving High-Performance Sparse Libraries Using Compiler-Assisted Specialization: A PETSc Case Study.
Proceedings of the 26th IEEE International Parallel and Distributed Processing Symposium Workshops & PhD Forum, 2012

2011
Auto-tuning full applications: A case study.
IJHPCA, 2011

2010
A Programming Language Interface to Describe Transformations and Code Generation.
Proceedings of the Languages and Compilers for Parallel Computing, 2010

Speeding up Nek5000 with autotuning and specialization.
Proceedings of the 24th International Conference on Supercomputing, 2010

Autotuning and Specialization: Speeding up Matrix Multiply for Small Matrices with Compiler Technology.
Proceedings of the Software Automatic Tuning, From Concepts to State-of-the-Art Results, 2010

2009
Loop Transformation Recipes for Code Generation and Auto-Tuning.
Proceedings of the Languages and Compilers for Parallel Computing, 2009

A scalable auto-tuning framework for compiler optimization.
Proceedings of the 23rd IEEE International Symposium on Parallel and Distributed Processing, 2009

Model-guided autotuning of high-productivity languages for petascale computing.
Proceedings of the 18th ACM International Symposium on High Performance Distributed Computing, 2009

2007
Model-Guided Empirical Optimization for Multimedia Extension Architectures: A Case Study.
Proceedings of the 21th International Parallel and Distributed Processing Symposium (IPDPS 2007), 2007

Intelligent Optimization of Parallel and Distributed Applications.
Proceedings of the 21th International Parallel and Distributed Processing Symposium (IPDPS 2007), 2007

2006
An overview of the ECO project.
Proceedings of the 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), 2006

2005
A Systematic Approach to Model-Guided Empirical Search for Memory Hierarchy Optimization.
Proceedings of the Languages and Compilers for Parallel Computing, 2005

Combining Models and Guided Empirical Search to Optimize for Multiple Levels of the Memory Hierarchy.
Proceedings of the 3nd IEEE / ACM International Symposium on Code Generation and Optimization (CGO 2005), 2005

2003
ECO: An Empirical-Based Compilation and Optimization System.
Proceedings of the 17th International Parallel and Distributed Processing Symposium (IPDPS 2003), 2003

2002
The architecture of the DIVA processing-in-memory chip.
Proceedings of the 16th international conference on Supercomputing, 2002


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