Jaewook Shin

This page is a disambiguation page, it actually contains mutiple papers from persons of the same or a similar name.

Bibliography

2023
Design and Operation of Autonomous Wheelchair Towing Robot.
CoRR, 2023

2022
Variable Matrix-Type Step-Size Affine Projection Sign Algorithm for System Identification in the Presence of Impulsive Noise.
Symmetry, 2022

An Enhanced Affine Projection Algorithm Based on the Adjustment of Input-Vector Number.
Entropy, 2022

A Novel Normalized Subband Adaptive Filter Algorithm Based on the Joint-Optimization Scheme.
IEEE Access, 2022

2021
ℒp-Norm-like Affine Projection Sign Algorithm for Sparse System to Ensure Robustness against Impulsive Noise.
Symmetry, 2021

Comparative Study of Markov Chain With Recurrent Neural Network for Short Term Velocity Prediction Implemented on an Embedded System.
IEEE Access, 2021

2020
Blind Source Separation for Myelin Water Fraction Mapping Using Multi-Echo Gradient Echo Imaging.
IEEE Trans. Medical Imaging, 2020

2019
Vehicle Speed Prediction Using a Markov Chain With Speed Constraints.
IEEE Trans. Intell. Transp. Syst., 2019

A bias-compensated proportionate NLMS algorithm with noisy input signals.
Int. J. Commun. Syst., 2019

Cover Image.
Int. J. Commun. Syst., 2019

2018
Variable step-size sign subband adaptive filter with subband filter selection.
Signal Process., 2018

Adaptive regularisation for normalised subband adaptive filter: mean-square performance analysis approach.
IET Signal Process., 2018

A 4-to-16GHz inverter-based injection-locked quadrature clock generator with phase interpolators for multi-standard I/Os in 7nm FinFET.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

2017
Fast Spin Echo Imaging-Based Electric Property Tomography With K-Space Weighting via ${T}_{2}$ Relaxation (rEPT).
IEEE Trans. Medical Imaging, 2017

Silver Nanoparticle Modified Electrode Covered by Graphene Oxide for the Enhanced Electrochemical Detection of Dopamine.
Sensors, 2017

A 56-Gb/s PAM4 Wireline Transceiver Using a 32-Way Time-Interleaved SAR ADC in 16-nm FinFET.
IEEE J. Solid State Circuits, 2017

Effect of Missing Inter-Beat Interval Data on Heart Rate Variability Analysis Using Wrist-Worn Wearables.
J. Medical Syst., 2017

A robust affine projection sign algorithm against the high power of measurement noises.
Int. J. Commun. Syst., 2017

2016
A 2 GHz Synthesized Fractional-N ADPLL With Dual-Referenced Interpolating TDC.
IEEE J. Solid State Circuits, 2016

A variable step-size diffusion affine projection algorithm.
Int. J. Commun. Syst., 2016

To Be Connected or Not To Be Connected? Mobile Messenger Overload, Fatigue, and Mobile Shunning.
Cyberpsychology Behav. Soc. Netw., 2016

A 56Gb/s PAM4 wireline transceiver using a 32-way time-interleaved SAR ADC in 16nm FinFET.
Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016

2015
An Improved NLMS Algorithm in Sparse Systems Against Noisy Input Signals.
IEEE Trans. Circuits Syst. II Express Briefs, 2015

Variable step-size sign algorithm against impulsive noises.
IET Signal Process., 2015

14.9 Sub-sampling all-digital fractional-N frequency synthesizer with -111dBc/Hz in-band phase noise and an FOM of -242dB.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

2014
Variable Step-Size Affine Projection Sign Algorithm.
IEEE Trans. Circuits Syst. II Express Briefs, 2014

A band-dependent variable step-size sign subband adaptive filter.
Signal Process., 2014

Mode Switching for Device-to-Device Communication in LTE-A Network.
Proceedings of the 12th International Conference on Advances in Mobile Computing and Multimedia, 2014

Development of device-to-device communication in LTE-Advanced system.
Proceedings of the IEEE International Conference on Consumer Electronics, 2014

2013
An Affine Projection Algorithm With Update-Interval Selection.
IEEE Trans. Signal Process., 2013

Variable Step-Size Sign Subband Adaptive Filter.
IEEE Signal Process. Lett., 2013

Measurement of Inter-Frequency Small Cell in Heterogeneous Networks.
Proceedings of the 11th International Conference on Advances in Mobile Computing & Multimedia, 2013

Non-periodic-partial-update affine projection algorithm with data-selective updating.
Proceedings of the International Symposium on Intelligent Signal Processing and Communication Systems, 2013

2012
A 1.9-3.8 GHz ΔΣ Fractional-N PLL Frequency Synthesizer With Fast Auto-Calibration of Loop Bandwidth and VCO Frequency.
IEEE J. Solid State Circuits, 2012

2011
A two-stage affine projection algorithm with mean-square-error-matching step-sizes.
Signal Process., 2011

Design Considerations for Autocalibrations of Wide-Band ΔΣ Fractional-N PLL Synthesizers.
J. Electr. Comput. Eng., 2011

2010
A Fast and High-Precision VCO Frequency Calibration Technique for Wideband Delta Sigma Fractional-N Frequency Synthesizers.
IEEE Trans. Circuits Syst. I Regul. Pap., 2010

A CMOS high-speed pulse swallow frequency divider for ΔΣ fractional-N PLL's.
IEICE Electron. Express, 2010

On-the-fly speed and power scaling of an E-TSPC dual modulus prescaler using forward body bias in 0.25 μm CMOS.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

Speeding up Nek5000 with autotuning and specialization.
Proceedings of the 24th International Conference on Supercomputing, 2010

Autotuning and Specialization: Speeding up Matrix Multiply for Small Matrices with Compiler Technology.
Proceedings of the Software Automatic Tuning, From Concepts to State-of-the-Art Results, 2010

2009
Evaluating compiler technology for control-flow optimizations for multimedia extension architectures.
Microprocess. Microsystems, 2009

Loop Transformation Recipes for Code Generation and Auto-Tuning.
Proceedings of the Languages and Compilers for Parallel Computing, 2009

Improving Random Walk Performance.
Proceedings of the 2009 International Conference on Scientific Computing, 2009

2008
A Wide-Band CMOS <i>LC VCO</i> With Linearized Coarse Tuning Characteristics.
IEEE Trans. Circuits Syst. II Express Briefs, 2008

Design of Session and Bearer Control Signaling in 3GPP LTE System.
Proceedings of the 68th IEEE Vehicular Technology Conference, 2008

A CMOS direct conversion transmitter with integrated in-band harmonic suppression for IEEE 802.22 cognitive radio applications.
Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008

2007
A Novel Routing Path Discovery and Data Delivery Scheme for Ubiquitous Internet Connectivity Based on Hierarchical Mobile AODV6 Networks.
Proceedings of the 65th IEEE Vehicular Technology Conference, 2007

Comparison of two activity analyses for automatic differentiation: context-sensitive flow-insensitive vs. context-insensitive flow-sensitive.
Proceedings of the 2007 ACM Symposium on Applied Computing (SAC), 2007

Model-Guided Empirical Optimization for Multimedia Extension Architectures: A Case Study.
Proceedings of the 21th International Parallel and Distributed Processing Symposium (IPDPS 2007), 2007

Introducing Control Flow into Vectorized Code.
Proceedings of the 16th International Conference on Parallel Architectures and Compilation Techniques (PACT 2007), 2007

2005
Superword-Level Parallelism in the Presence of Control Flow.
Proceedings of the 3nd IEEE / ACM International Symposium on Code Generation and Optimization (CGO 2005), 2005

2004
Fixed Nodes in AODV Routing Protocol: A Simulation Study.
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2004

2003
Exploiting Superword-Level Locality in Multimedia Extension Architectures.
J. Instr. Level Parallelism, 2003

2002
The architecture of the DIVA processing-in-memory chip.
Proceedings of the 16th international conference on Supercomputing, 2002

Compiler-Controlled Caching in Superword Register Files for Multimedia Extension Architectures.
Proceedings of the 2002 International Conference on Parallel Architectures and Compilation Techniques (PACT 2002), 2002

1999
Mapping Irregular Applications to DIVA, a PIM-based Data-Intensive Architecture.
Proceedings of the ACM/IEEE Conference on Supercomputing, 1999


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