Chun-Ying Juan

According to our database1, Chun-Ying Juan authored at least 14 papers between 2008 and 2017.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2017
A modular wireless sensor platform and its applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

2015
Process corner detection by skew inverters for 500 MHZ 2×VDD output buffer using 40-nm CMOS technology.
Microelectron. J., 2015

2014
A FlexRay Transceiver Design with Bus Guardian for In-car Networking Systems Compliant with FlexRay Standard.
J. Signal Process. Syst., 2014

A CMOS wide-range temperature sensor with process compensation and second-order calibration for Battery Management Systems.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

2013
A 800 Mbps and 12.37 ps Jitter Bidirectional Mixed-Voltage I/O Buffer With Dual-Path Gate-Tracking Circuit.
IEEE Trans. Circuits Syst. I Regul. Pap., 2013

On-Chip Process and Temperature Monitor for Self-Adjusting Slew Rate Control of 2, ×, VDD Output Buffers.
IEEE Trans. Circuits Syst. I Regul. Pap., 2013

A 2×VDD output buffer with PVT detector for slew rate compensation.
Microelectron. J., 2013

A low-power transceiver design for FlexRay-based communication systems.
Microelectron. J., 2013

High voltage operational amplifier and high voltage transceiver using 0.25 µm 60V BCD process for Battery Management Systems.
Proceedings of 2013 International Conference on IC Design & Technology, 2013

2012
A digital over-temperature protector for FlexRay systems.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

A high voltage analog multiplexer with digital calibration for battery management systems.
Proceedings of the IEEE International Conference on IC Design & Technology, 2012

Configurable Active Star design for automobile FlexRay systems.
Proceedings of the IEEE International Conference on Consumer Electronics, 2012

2009
Low-power 7.2 GHz Complementary All-N-Transistor Logic using 90 nm CMOS Technology.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

2008
A 32-bit carry lookahead adder design using complementary all-N-transistor logic.
Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, 2008


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