Gang-Neng Sung

According to our database1, Gang-Neng Sung authored at least 35 papers between 2006 and 2019.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2019
Intelligent SOMA interactive gaming system.
Proceedings of the 9th IEEE International Conference on Consumer Electronics, 2019

2018
MorSocket: An Expandable IoT-Based Smart Socket System.
IEEE Access, 2018

2016
A Wireless and Batteryless Intelligent Carbon Monoxide Sensor.
Sensors, 2016

2015
A real-time bridge structural health monitoring device using cost-effective one-axis accelerometers.
Proceedings of the Tenth IEEE International Conference on Intelligent Sensors, 2015

Low-cost hall-effect sensors for real-time monitoring pier scour.
Proceedings of the Tenth IEEE International Conference on Intelligent Sensors, 2015

Smart electronic dose counter for pressurized metered dose inhaler.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2015

2014
A FlexRay Transceiver Design with Bus Guardian for In-car Networking Systems Compliant with FlexRay Standard.
J. Signal Process. Syst., 2014

Efficient Multiply-by-3 and Divide-by-3 Algorithms and Their Fast Hardware Implementation.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2014

2013
A low-power transceiver design for FlexRay-based communication systems.
Microelectron. J., 2013

Morpack Cube: A portable 3D heterogeneous system integration platform.
Proceedings of the 2013 IEEE International SOC Conference, Erlangen, Germany, 2013

A single-inductor programmable-output (SIPO) DC-DC converter for low power applications.
Proceedings of the IECON 2013, 2013

2012
A Signed Array Multiplier with Bypassing Logic.
J. Signal Process. Syst., 2012

A fast hysteretic buck converter with adaptive ripple controller.
Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012

Efficient algorithm and hardware implementation of 3N for arithmetic and for Radix-8 encodings.
Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012

A PLC transceiver design of in-vehicle power line in FlexRay-based automotive communication systems.
Proceedings of the IEEE International Conference on Consumer Electronics, 2012

2011
A high-efficiency DC-DC buck converter for sub-2×VDD power supply.
Microelectron. J., 2011

A high speed transceiver front-end design with fault detection for FlexRay-based automotive communication systems.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

Design of ultra-wide-load, high-efficient DC-DC buck converters.
Proceedings of the 18th IEEE International Conference on Electronics, Circuits and Systems, 2011

2010
Energy-Efficient Double-Edge Triggered Flip-Flop.
J. Signal Process. Syst., 2010

A Transceiver Front End for Electronic Control Units in FlexRay-Based Automotive Communication Systems.
IEEE Trans. Circuits Syst. I Regul. Pap., 2010

All-Digital Frequency Synthesizer Using a Flying Adder.
IEEE Trans. Circuits Syst. II Express Briefs, 2010

A low-power 2.45 GHz WPAN modulator/demodulator.
Microelectron. J., 2010

2009
Low-Power Multiplier Design Using a Bypassing Technique.
J. Signal Process. Syst., 2009

Low-power 7.2 GHz Complementary All-N-Transistor Logic using 90 nm CMOS Technology.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

2008
Power-Aware Design of An 8-Bit Pipelining ANT-Based CLA Using Data Transition Detection.
J. Signal Process. Syst., 2008

A 1.7-ns Access Time SRAM Using Variable Bulk Bias wordline-Controlled transistors.
J. Circuits Syst. Comput., 2008

A power-aware 2-dimensional bypassing multiplier using cell-based design flow.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

A 32-bit carry lookahead adder design using complementary all-N-transistor logic.
Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, 2008

2007
An 80MHz PLL with 72.7ps peak-to-peak jitter.
Microelectron. J., 2007

A Low-power Sensorless Inverter Controller of Brushless DC Motors.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

2006
A Low-Power 2-Dimensional Bypassing Multiplier Using 0.35 um CMOS Technology.
Proceedings of the 2006 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006), 2006

Codec Design for Variable-Length to Fixed-Length Data Conversion for H.263.
Proceedings of the Second International Conference on Intelligent Information Hiding and Multimedia Signal Processing (IIH-MSP 2006), 2006

Engery-Efficient Double-Edge Triggered Flip-Flop Design.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006

A Low-power 4-T SAM Design for OFDM Demodulators in DVB Receiversers.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006

An Implantable SOC Chip for Micro-stimulating and Neural Signal Recording.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006


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