Chun-Yu Lin
Orcid: 0000-0003-3375-520XAffiliations:
- National Taiwan Normal University, Department of Electrical Engineering, Taiwan
- National Chiao Tung University, Institute of Electronics, Hsinchu, Taiwan (PhD 2009)
According to our database1,
Chun-Yu Lin
authored at least 28 papers
between 2008 and 2018.
Collaborative distances:
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Bibliography
2018
Low-Loss I/O Pad With ESD Protection for K/Ka-Bands Applications in the Nanoscale CMOS Process.
IEEE Trans. Circuits Syst. II Express Briefs, 2018
Investigation and application of vertical NPN devices for RF ESD protection in BiCMOS technology.
Microelectron. Reliab., 2018
2017
Microelectron. Reliab., 2017
IEICE Electron. Express, 2017
2016
IEICE Electron. Express, 2016
Proceedings of the IEEE 59th International Midwest Symposium on Circuits and Systems, 2016
Proceedings of the International Symposium on Integrated Circuits, 2016
On-chip ESD protection design for radio-frequency power amplifier with large-swing-tolerance consideration.
Proceedings of the 2016 IEEE Asia Pacific Conference on Circuits and Systems, 2016
2015
Investigation on SCR-based ESD protection device for biomedical integrated circuits in a 0.18-μm CMOS process.
Microelectron. Reliab., 2015
2014
A Fully Integrated 8-Channel Closed-Loop Neural-Prosthetic CMOS SoC for Real-Time Epileptic Seizure Control.
IEEE J. Solid State Circuits, 2014
A high-voltage-tolerant stimulator realized in the low-voltage CMOS process for cochlear implant.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014
Proceedings of the IEEE International Conference on Consumer Electronics - Taiwan, 2014
2013
Implantable Stimulator for Epileptic Seizure Suppression With Loading Impedance Adaptability.
IEEE Trans. Biomed. Circuits Syst., 2013
A fully integrated 8-channel closed-loop neural-prosthetic SoC for real-time epileptic seizure control.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013
2012
Microelectron. Reliab., 2012
High-voltage-tolerant stimulator with adaptive loading consideration for electronic epilepsy prosthetic SoC in a 0.18-µm CMOS process.
Proceedings of the 10th IEEE International NEWCAS Conference, 2012
Proceedings of the International Symposium on Intelligent Signal Processing and Communications Systems, 2012
Compact and low-loss ESD protection design for V-band RF applications in a 65-nm CMOS technology.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012
Live demonstration: Implantable stimulator for epileptic seizure suppression with loading impedance adaptability.
Proceedings of the 2012 IEEE Biomedical Circuits and Systems Conference, 2012
Design of negative high voltage generator for biphasic stimulator with soc integration consideration.
Proceedings of the 2012 IEEE Biomedical Circuits and Systems Conference, 2012
Design of ESD protection for RF CMOS power amplifier with inductor in matching network.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2012
2011
Design and implementation of configurable ESD protection cell for 60-GHz RF circuits in a 65-nm CMOS process.
Microelectron. Reliab., 2011
Proceedings of the 20th European Conference on Circuit Theory and Design, 2011
2010
Design of differential low-noise amplifier with cross-coupled-SCR ESD protection scheme.
Microelectron. Reliab., 2010
2×VDD-tolerant power-rail ESD clamp circuit with low standby leakage in 65-nm CMOS process.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
2008
IEICE Trans. Electron., 2008
ESD protection design for fully integrated CMOS RF power amplifiers with waffle-structured SCR.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008