According to our database1, Li-Wei Chu authored at least 7 papers between 2011 and 2014.
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A 40 nm 512 kb Cross-Point 8 T Pipeline SRAM With Binary Word-Line Boosting Control, Ripple Bit-Line and Adaptive Data-Aware Write-Assist.
IEEE Trans. on Circuits and Systems, 2014
ESD protection design for wideband RF applications in 65-nm CMOS process.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014
A 40nm 1.0Mb 6T pipeline SRAM with digital-based Bit-Line Under-Drive, Three-Step-Up Word-Line, Adaptive Data-Aware Write-Assist with VCS tracking and Adaptive Voltage Detector for boosting control.
Proceedings of the 2013 IEEE International SOC Conference, Erlangen, Germany, 2013
Compact and low-loss ESD protection design for V-band RF applications in a 65-nm CMOS technology.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012
Design of ESD protection for RF CMOS power amplifier with inductor in matching network.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2012
Design and implementation of configurable ESD protection cell for 60-GHz RF circuits in a 65-nm CMOS process.
Microelectronics Reliability, 2011
Modified LC-tank ESD protection design for 60-GHz RF applications.
Proceedings of the 20th European Conference on Circuit Theory and Design, 2011