Chung-Hsuan Yang

According to our database, Chung-Hsuan Yang authored at least 4 papers between 2020 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2023

An FM-Index Based High-Throughput Memory-Efficient FPGA Accelerator for Paired-End Short-Read Mapping.

Chung-Hsuan Yang, Yi-Chung Wu, Yen-Lung Chen, Chao-Hsi Lee, Jui-Hung Hung, Chia-Hsiang Yang

IEEE Trans. Biomed. Circuits Syst., December, 2023

A Fully Integrated End-to-End Genome Analysis Accelerator for Next-Generation Sequencing.

Yen-Lung Chen, Chung-Hsuan Yang, Yi-Chung Wu, Chao-Hsi Lee, Wen-Ching Chen, Liang-Yi Lin, Nian-Shyang Chang, Chun-Pin Lin, Chi-Shi Chen, Jui-Hung Hung, Chia-Hsiang Yang

Proceedings of the IEEE International Solid- State Circuits Conference, 2023

2021

A 975-mW Fully Integrated Genetic Variant Discovery System-on-Chip in 28 nm for Next-Generation Sequencing.

Yi-Chung Wu, Yen-Lung Chen, Chung-Hsuan Yang, Chao-Hsi Lee, Chao-Yang Yu, Nian-Shyang Chang, Ling-Chien Chen, Jia-Rong Chang, Chun-Pin Lin, Hung-Lieh Chen, Chi-Shi Chen, Jui-Hung Hung, Chia-Hsiang Yang

IEEE J. Solid State Circuits, 2021

2020

21.1 A Fully Integrated Genetic Variant Discovery SoC for Next-Generation Sequencing.

Yi-Chung Wu, Yen-Lung Chen, Chung-Hsuan Yang, Chao-Hsi Lee, Chao-Yang Yu, Nian-Shyang Chang, Ling-Chien Chen, Jia-Rong Chang, Chun-Pin Lin, Hung-Lieh Chen, Chi-Shi Chen, Jui-Hung Hung, Chia-Hsiang Yang

Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020