Chun-Pin Lin

According to our database, Chun-Pin Lin authored at least 13 papers between 2000 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2023

A 28nm 142mW Motion-Control SoC for Autonomous Mobile Robots.

I-Ting Lin, Zih-Sing Fu, Wen-Ching Chen, Liang-Yi Lin, Nian-Shyang Chang, Chun-Pin Lin, Chi-Shi Chen, Chia-Hsiang Yang

Proceedings of the IEEE International Solid- State Circuits Conference, 2023

A 28nm 11.2TOPS/W Hardware-Utilization-Aware Neural-Network Accelerator with Dynamic Dataflow.

Cheng-Yan Du, Chieh-Fu Tsai, Wen-Ching Chen, Liang-Yi Lin, Nian-Shyang Chang, Chun-Pin Lin, Chi-Shi Chen, Chia-Hsiang Yang

Proceedings of the IEEE International Solid- State Circuits Conference, 2023

A Fully Integrated End-to-End Genome Analysis Accelerator for Next-Generation Sequencing.

Yen-Lung Chen, Chung-Hsuan Yang, Yi-Chung Wu, Chao-Hsi Lee, Wen-Ching Chen, Liang-Yi Lin, Nian-Shyang Chang, Chun-Pin Lin, Chi-Shi Chen, Jui-Hung Hung, Chia-Hsiang Yang

Proceedings of the IEEE International Solid- State Circuits Conference, 2023

2022

A 28-nm 25.1 TOPS/W Sparsity-Aware CNN-GCN Deep Learning SoC for Mobile Augmented Reality.

Wen-Cong Huang, I-Ting Lin, Wen-Ching Chen, Liang-Yi Lin, Nian-Shyang Chang, Chun-Pin Lin, Chi-Shi Chen, Chia-Hsiang Yang

Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

2021

A 975-mW Fully Integrated Genetic Variant Discovery System-on-Chip in 28 nm for Next-Generation Sequencing.

Yi-Chung Wu, Yen-Lung Chen, Chung-Hsuan Yang, Chao-Hsi Lee, Chao-Yang Yu, Nian-Shyang Chang, Ling-Chien Chen, Jia-Rong Chang, Chun-Pin Lin, Hung-Lieh Chen, Chi-Shi Chen, Jui-Hung Hung, Chia-Hsiang Yang

IEEE J. Solid State Circuits, 2021

A 1.625 TOPS/W SOC for Deep CNN Training and Inference in 28nm CMOS.

Yu-Tung Liu, ChuKing Kung, Ming-Hang Hsieh, Hsiu-Wen Wang, Chun-Pin Lin, Chao-Yang Yu, Chi-Shi Chen, Tzi-Dar Chiueh

Proceedings of the 51st IEEE European Solid-State Device Research Conference, 2021

2020

21.1 A Fully Integrated Genetic Variant Discovery SoC for Next-Generation Sequencing.

Yi-Chung Wu, Yen-Lung Chen, Chung-Hsuan Yang, Chao-Hsi Lee, Chao-Yang Yu, Nian-Shyang Chang, Ling-Chien Chen, Jia-Rong Chang, Chun-Pin Lin, Hung-Lieh Chen, Chi-Shi Chen, Jui-Hung Hung, Chia-Hsiang Yang

Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020

2018

Universal CMOS Diamond-Graph Circuit for Embedded Computing.

Shun-Wen Cheng, Chun-Pin Lin, Chi-Shi Chen, Wei-Chang Tsai

Proceedings of the 31st IEEE International System-on-Chip Conference, 2018

2017

An implantable 128-channel wireless neural-sensing microsystem using TSV-embedded dissolvable μ-needle array and flexible interposer.

Po-Tsang Huang, Yu-Chieh Huang, Shang-Lin Wu, Yu-Chen Hu, Ming-Wei Lu, Ting-Wei Sheng, Fung-Kai Chang, Chun-Pin Lin, Nien-Shang Chang, Hung-Lieh Chen, Chi-Shi Chen, Jeng-Ren Duann, Tzai-Wen Chiu, Wei Hwang, Kuan-Neng Chen, Ching-Te Chuang, Jin-Chern Chiou

Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

2013

Morpack Cube: A portable 3D heterogeneous system integration platform.

Chun-Chieh Chiu, Chih-Hsing Lin, Chih-Chyau Yang, Yi-Jun Liu, Ssu-Ying Chen, Jin-Ju Chue, Chih-Ting Kuo, Gang-Neng Sung, Chun-Pin Lin, Chien-Ming Wu, Chun-Ming Huang

Proceedings of the 2013 IEEE International SOC Conference, Erlangen, Germany, 2013

2012

A novel design methodology for hybrid process 3D-IC.

Chien-Lin Huang, Nian-Shyang Chang, Chi-Shi Chen, Chun-Pin Lin, Chien-Ming Wu, Chun-Ming Huang

Proceedings of Technical Program of 2012 VLSI Design, Automation and Test, 2012

CIC signal processing embedded system a modulizable platform for multi-domain signal processing.

Chih-Ting Kuo, Chun-Yu Chen, Yu-Tsang Chang, Chun-Pin Lin, Chien-Ming Wu, Chun-Ming Huang

Proceedings of the Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2012

2000

The design and implementation of DCT/IDCT chip with novel architecture.

Kuo-Hsing Cheng, Chih-Sheng Huang, Chun-Pin Lin

Proceedings of the IEEE International Symposium on Circuits and Systems, 2000