Chi-Shi Chen

According to our database1, Chi-Shi Chen authored at least 17 papers between 2006 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
A 28nm 142mW Motion-Control SoC for Autonomous Mobile Robots.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023

A 28nm 11.2TOPS/W Hardware-Utilization-Aware Neural-Network Accelerator with Dynamic Dataflow.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023

A Fully Integrated End-to-End Genome Analysis Accelerator for Next-Generation Sequencing.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023

2022
A 28-nm 25.1 TOPS/W Sparsity-Aware CNN-GCN Deep Learning SoC for Mobile Augmented Reality.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

2021
A 975-mW Fully Integrated Genetic Variant Discovery System-on-Chip in 28 nm for Next-Generation Sequencing.
IEEE J. Solid State Circuits, 2021

A 1.625 TOPS/W SOC for Deep CNN Training and Inference in 28nm CMOS.
Proceedings of the 51st IEEE European Solid-State Device Research Conference, 2021

Live Demo: An 176.3 GOPs Object Detection CNN Accelerator Emulated in a 28nm CMOS Technology.
Proceedings of the 3rd IEEE International Conference on Artificial Intelligence Circuits and Systems, 2021

An 176.3 GOPs Object Detection CNN Accelerator Emulated in a 28nm CMOS Technology.
Proceedings of the 3rd IEEE International Conference on Artificial Intelligence Circuits and Systems, 2021

2020
21.1 A Fully Integrated Genetic Variant Discovery SoC for Next-Generation Sequencing.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020

2019
High-Efficiency Step-Down Multi-Mode Switching DC-DC Converter for IoT Devices.
Proceedings of the 32nd IEEE International System-on-Chip Conference, 2019

2018
Universal CMOS Diamond-Graph Circuit for Embedded Computing.
Proceedings of the 31st IEEE International System-on-Chip Conference, 2018

2017
An implantable 128-channel wireless neural-sensing microsystem using TSV-embedded dissolvable μ-needle array and flexible interposer.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

2012
A novel design methodology for hybrid process 3D-IC.
Proceedings of Technical Program of 2012 VLSI Design, Automation and Test, 2012

2011
Programmable System-on-Chip for Silicon Prototyping.
IEEE Trans. Ind. Electron., 2011

A novel methodology for Multi-Project System-on-a-Chip.
Proceedings of the IEEE 24th International SoC Conference, SOCC 2011, Taipei, Taiwan, 2011

2009
Implementation and Prototyping of a Complex Multi-project System-on-a-chip.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

2006
Multi-Project System-on-Chip (MP-SoC): A Novel Test Vehicle for SoC Silicon Prototyping.
Proceedings of the 2006 IEEE International SOC Conference, Austin, Texas, USA, 2006


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