Yi-Hau Chen

According to our database1, Yi-Hau Chen authored at least 25 papers between 2003 and 2018.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2018
Overlapping group screening for detection of gene-gene interactions: application to gene expression profiles with survival trait.
BMC Bioinformatics, 2018

Optimization of Lookup Table Size in Table-Bound Design of Function Computation.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

2017
Hierarchical Multipartite Function Evaluation.
IEEE Trans. Computers, 2017

A knowledge-based T2-statistic to perform pathway analysis for quantitative proteomic data.
PLoS Computational Biology, 2017

2016
Joint analysis of current count and current status data.
J. Multivariate Analysis, 2016

2011
A Unifying Approach to the Ruin Problems Under the Compound Binomial Model.
Proceedings of the Modeling Risk Management for Resources and Environment in China, 2011

Nonparametric maximum likelihood analysis of clustered current status data with the gamma-frailty Cox model.
Computational Statistics & Data Analysis, 2011

2010
Architecture Design of Fine Grain Quality Scalable Encoder with CABAC for H.264/AVC Scalable Extension.
Signal Processing Systems, 2010

A 59.5mW scalable/multi-view video decoder chip for Quad/3D Full HDTV and video streaming applications.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010

Low bandwidth decoder framework for H.264/AVC scalable extension.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

2009
Bandwidth-efficient cache-based motion compensation architecture with DRAM-friendly data access control.
Proceedings of the IEEE International Conference on Acoustics, 2009

2008
VLSI Architecture Design of Fractional Motion Estimation for H.264/AVC.
Signal Processing Systems, 2008

Analysis and Hardware Architecture Design of Global Motion Estimation.
Signal Processing Systems, 2008

Efficient Architecture Design of Motion-Compensated Temporal Filtering/Motion Compensated Prediction Engine.
IEEE Trans. Circuits Syst. Video Techn., 2008

Frame-parallel design strategy for high definition B-frame H.264/AVC encoder.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

2007
Fast prediction algorithm of adaptive GOP structure for SVC.
Proceedings of the Visual Communications and Image Processing 2007, 2007

Architecture Design of Fine Grain SNR Scalable Encoder with CABAC for H.264/AVC Scalable Extension.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2007

2006
Level C+ data reuse scheme for motion estimation with corresponding coding orders.
IEEE Trans. Circuits Syst. Video Techn., 2006

Analysis and VLSI architecture of update step in motion-compensated temporal filtering.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Frame-level data reuse for motion-compensated temporal filtering.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Scalable Rate-Distortion-Computation Hardware Accelerator for MCTF and ME.
Proceedings of the 2006 IEEE International Conference on Multimedia and Expo, 2006

2005
Architecture of global motion compensation for MPEG-4 advanced simple profile.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

System analysis of VLSI architecture for motion-compensated temporal filtering.
Proceedings of the 2005 International Conference on Image Processing, 2005

Memory analysis of VLSI architecture for 5/3 and 1/3 motion-compensated temporal filtering [video coding applications].
Proceedings of the 2005 IEEE International Conference on Acoustics, 2005

2003
Unsupervised object-based sprite coding system for tennis sport.
Proceedings of the 2003 IEEE International Conference on Multimedia and Expo, 2003


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