Clayton R. Farias

According to our database, Clayton R. Farias authored at least 6 papers between 2022 and 2026.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2026

Fast Statistical Estimation of Circuit-Level Cross Section Considering Logical Masking Effects.

Clayton R. Farias, Tiago R. Balen, Paulo F. Butzen

Proceedings of the 27th IEEE Latin American Test Symposium, 2026

RISC-V Area-Optimized ASIC Design with a Multi-Height 7nm FinFET Standard Cell Library.

Matheus Lemos, Clayton R. Farias, Paulo F. Butzen, José Rodrigo Azambuja

Proceedings of the 17th IEEE Latin America Symposium on Circuits and System, 2026

2025

Improving Circuit Area with a 7Nm Predictive FinFET PDK Multi-Height Standard Cell Library.

Matheus Lemos, Clayton R. Farias, Paulo F. Butzen, José Rodrigo Azambuja

Proceedings of the 16th IEEE Latin America Symposium on Circuits and Systems, 2025

2024

Cross-Section Estimation for Assessment of Circuit Susceptibility to Radiation.

Clayton R. Farias, Tiago R. Balen, Paulo F. Butzen

Proceedings of the 25th IEEE Latin American Test Symposium, 2024

2022

Evaluating Soft Error Reliability of Combinational Circuits Using a Monte Carlo Based Method.

Clayton R. Farias, Rafael B. Schvittz, Tiago R. Balen, Paulo F. Butzen

Proceedings of the 23rd IEEE Latin American Test Symposium, 2022

A Fast Approximate Function Generation Method to ATMR Architecture.

Guilherme B. Manske, Clayton R. Farias, Paulo F. Butzen, Leomar S. da Rosa

Proceedings of the 13th IEEE Latin America Symposium on Circuits and System, 2022