Daniele Mangano

According to our database, Daniele Mangano authored at least 8 papers between 2005 and 2010.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2010

Enabling dynamic and programmable QoS in SoCs.

Daniele Mangano, Giovanni Strano

Proceedings of the Third International Workshop on Network on Chip Architectures, 2010

2008

Advanced architectures for System-on-Chip in deep submicron technologies.

Daniele Mangano

PhD thesis, 2008

2007

Relieving physical issues in new NoC-based SoCs.

Daniele Mangano, Alberto Scandurra, Carlo Pistritto

Proceedings of the 2nd Internationa ICST Conference on Nano-Networks, 2007

Effective full-duplex Mesochronous Link Architecture for Network-on-Chip Data-Link layer.

Daniele Mangano, G. Falconeri, Carlo Pistritto, Alberto Scandurra

Proceedings of the Tenth Euromicro Conference on Digital System Design: Architectures, 2007

2006

Skew Insensitive Physical Links for Network on Chip.

Daniele Mangano, Riccardo Locatelli, Alberto Scandurra, Carlo Pistritto, Marcello Coppola, Luca Fanucci, Francesco Vitullo, Dario Zandri

Proceedings of the 1st International ICST Conference on Nano-Networks, 2006

GALS networks on chip: a new solution for asynchronous delay-insensitive links.

Giuseppe Campobello, Marco Castano, Carmine Ciofi, Daniele Mangano

Proceedings of the Conference on Design, Automation and Test in Europe: Designers' Forum, 2006

2005

A cache design for high performance embedded systems.

Pierfrancesco Foglia, Daniele Mangano, Cosimo Antonio Prete

J. Embed. Comput., 2005

A NUCA Model for Embedded Systems Cache Design.

Pierfrancesco Foglia, Daniele Mangano, Cosimo Antonio Prete

Proceedings of the 2005 3rd Workshop on Embedded Systems for Real-Time Multimedia, 2005