Carlo Pistritto

According to our database1, Carlo Pistritto authored at least 6 papers between 2006 and 2012.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2012
A mesochronous outfit for Network-on-Chip's interconnects retiming.
Proceedings of the 7th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, 2012

2011
A high-speed four-phase clock generator for low-power on-chip SerDes applications.
Microelectron. J., 2011

2007
Relieving physical issues in new NoC-based SoCs.
Proceedings of the 2nd Internationa ICST Conference on Nano-Networks, 2007

Effective full-duplex Mesochronous Link Architecture for Network-on-Chip Data-Link layer.
Proceedings of the Tenth Euromicro Conference on Digital System Design: Architectures, 2007

Interactive presentation: Capturing the interaction of the communication, memory and I/O subsystems in memory-centric industrial MPSoC platforms.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

2006
Skew Insensitive Physical Links for Network on Chip.
Proceedings of the 1st International ICST Conference on Nano-Networks, 2006


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