Deepali Garg

Orcid: 0009-0003-3304-9599

According to our database1, Deepali Garg authored at least 8 papers between 2019 and 2026.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

On csauthors.net:

Bibliography

2026
Security Analysis of Universal Circuits as a Mechanism for Hardware Obfuscation.
CoRR, April, 2026

2025
Universal Topological Arrays: An Efficient Solution for Provably Secure Hardware.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2025

2024
Quantifying the Efficacy of Logic Locking Methods.
Proceedings of the 37th International Conference on VLSI Design and 23rd International Conference on Embedded Systems, 2024

An IP-Agnostic Foundational Cell Array Offering Supply Chain Security.
Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024

2022
Logic Locking - Connecting Theory and Practice.
IACR Cryptol. ePrint Arch., 2022

MAB-Malware: A Reinforcement Learning Framework for Blackbox Generation of Adversarial Malware.
Proceedings of the ASIA CCS '22: ACM Asia Conference on Computer and Communications Security, Nagasaki, Japan, 30 May 2022, 2022

2020
Automatic Generation of Adversarial Examples for Interpreting Malware Classifiers.
CoRR, 2020

2019
All Things Considered: An Analysis of IoT Devices on Home Networks.
Proceedings of the 28th USENIX Security Symposium, 2019


  Loading...