Lawrence T. Pileggi
Orcid: 0000-0002-8605-8240Affiliations:
- Carnegie Mellon University, Pittsburgh, USA
According to our database1,
Lawrence T. Pileggi
authored at least 282 papers
between 1988 and 2024.
Collaborative distances:
Collaborative distances:
Awards
IEEE Fellow
IEEE Fellow 2002, "For contributions to simulation and modeling of integrated circuits".
Timeline
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Book In proceedings Article PhD thesis Dataset OtherLinks
Online presence:
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on orcid.org
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on ece.cmu.edu
On csauthors.net:
Bibliography
2024
Proceedings of the 37th International Conference on VLSI Design and 23rd International Conference on Embedded Systems, 2024
2023
NSF Integrated Circuit Research, Education and Workforce Development Workshop Final Report.
CoRR, 2023
CoRR, 2023
CoRR, 2023
Shedding Light on Inconsistencies in Grid Cybersecurity: Disconnects and Recommendations.
Proceedings of the 44th IEEE Symposium on Security and Privacy, 2023
Power Grid Behavioral Patterns and Risks of Generalization in Applied Machine Learning.
Proceedings of the Companion Proceedings of the 14th ACM International Conference on Future Energy Systems, 2023
2022
CoRR, 2022
Proceedings of the IEEE High Performance Extreme Computing Conference, 2022
2021
A Risk-Managed Steady-State Analysis to Assess The Impact of Power Grid Uncertainties.
CoRR, 2021
CoRR, 2021
A Convex Method of Generalized State Estimation using Circuit-theoretic Node-breaker Model.
CoRR, 2021
CoRR, 2021
CoRR, 2021
Proceedings of the Advances in Neural Information Processing Systems 34: Annual Conference on Neural Information Processing Systems 2021, 2021
Incremental Model Building Homotopy Approach for Solving Exact AC-Constrained Optimal Power Flow.
Proceedings of the 54th Hawaii International Conference on System Sciences, 2021
Proceedings of the FPGA '21: The 2021 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, Virtual Event, USA, February 28, 2021
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
2020
IEEE Trans. Very Large Scale Integr. Syst., 2020
IEEE Trans. Smart Grid, 2020
IEEE Trans. Neural Networks Learn. Syst., 2020
From Virtual Characterization to Test-Chips: DFM Analysis Through Pattern Enumeration.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
CoRR, 2020
Proceedings of the LPAR 2020: 23rd International Conference on Logic for Programming, 2020
Proceedings of the IEEE PES Innovative Smart Grid Technologies Europe, 2020
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020
Proceedings of the 2020 IEEE International Symposium on Hardware Oriented Security and Trust, 2020
2019
J. Hardw. Syst. Secur., 2019
CoRR, 2019
Efficient SpMV Operation for Large and Highly Sparse Matrices using Scalable Multi-way Merge Parallelization.
Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture, 2019
Proceedings of the 2019 IEEE PES Innovative Smart Grid Technologies Europe, 2019
A Linear Formulation for Power System State Estimation including RTU and PMU Measurements.
Proceedings of the 2019 IEEE PES Innovative Smart Grid Technologies Europe, 2019
Proceedings of the 2019 IEEE PES Innovative Smart Grid Technologies Europe, 2019
2018
IEEE Trans. Very Large Scale Integr. Syst., 2018
Analysis and Background Self-Calibration of Comparator Offset in Loop-Unrolled SAR ADCs.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018
Robust Probabilistic Analysis of Transmission Power Systems based on Equivalent Circuit Formulation.
CoRR, 2018
Proceedings of the 2018 SIAM International Conference on Data Mining, 2018
Proceedings of the Machine Learning and Knowledge Discovery in Databases, 2018
Proceedings of the 2018 IEEE International Conference on Rebooting Computing, 2018
Proceedings of the 2018 IEEE High Performance Extreme Computing Conference, 2018
A 125 MS/s 10.4 ENOB 10.1 fJ/Conv-Step Multi-Comparator SAR ADC with Comparator Noise Scaling in 65nm CMOS.
Proceedings of the 44th IEEE European Solid State Circuits Conference, 2018
Proceedings of the 27th ACM International Conference on Information and Knowledge Management, 2018
2017
Aggregated Load and Generation Equivalent Circuit Models with Semi-Empirical Data Fitting.
CoRR, 2017
Robust Convergence of Power Flow using Tx Stepping Method with Equivalent Circuit Formulation.
CoRR, 2017
Proceedings of the Machine Learning and Knowledge Discovery in Databases, 2017
A self-calibrating sense amplifier for a true random number generator using hybrid FinFET-straintronic MTJ.
Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2017
Proceedings of the 18th International Symposium on Quality Electronic Design, 2017
Proceedings of the 18th International Symposium on Quality Electronic Design, 2017
Proceedings of the 2017 IEEE PES Innovative Smart Grid Technologies Conference Europe, 2017
Proceedings of the 2017 IEEE High Performance Extreme Computing Conference, 2017
Proceedings of the 54th Annual Design Automation Conference, 2017
2016
A wideband RF receiver with extended statistical element selection based harmonic rejection calibration.
Integr., 2016
Proceedings of the IEEE International Conference on RFID Technology and Applications, 2016
Steady-state analysis of power system harmonics using equivalent split-circuit models.
Proceedings of the IEEE PES Innovative Smart Grid Technologies Conference Europe, 2016
Proceedings of the 2016 IEEE Power & Energy Society Innovative Smart Grid Technologies Conference, 2016
On the design of phase locked loop oscillatory neural networks: Mitigation of transmission delay effects.
Proceedings of the 2016 International Joint Conference on Neural Networks, 2016
Proceedings of the 2016 IEEE High Performance Extreme Computing Conference, 2016
Extended statistical element selection: a calibration method for high resolution in analog/RF designs.
Proceedings of the 53rd Annual Design Automation Conference, 2016
Re-thinking polynomial optimization: Efficient programming of reconfigurable radio frequency (RF) systems by convexification.
Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016
2015
IEEE Trans. Circuits Syst. II Express Briefs, 2015
Oscillatory Neural Networks Based on TMO Nano-Oscillators and Multi-Level RRAM Cells.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2015
Device Requirements and Technology-Driven Architecture Optimization for Analog Neurocomputing.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2015
Proceedings of the 48th International Symposium on Microarchitecture, 2015
Proceedings of the IEEE 6th Latin American Symposium on Circuits & Systems, 2015
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015
Proceedings of the 52nd Annual Design Automation Conference, 2015
Accurate passivity-enforced macromodeling for RF circuits via iterative zero/pole update based on measurement data.
Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015
2014
IEEE Trans. Circuits Syst. I Regul. Pap., 2014
A 69.5 mW 20 GS/s 6b Time-Interleaved ADC With Embedded Time-to-Digital Calibration in 32 nm CMOS SOI.
IEEE J. Solid State Circuits, 2014
Environment-Adaptable Efficient Optimization for Programming of Reconfigurable Radio Frequency (RF) Receivers.
Proceedings of the 2014 IEEE Military Communications Conference, 2014
22.2 A 69.5mW 20GS/s 6b time-interleaved ADC with embedded time-to-digital calibration in 32nm CMOS SOI.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2014
Algorithm/hardware co-optimized SAR image reconstruction with 3D-stacked logic in memory.
Proceedings of the IEEE High Performance Extreme Computing Conference, 2014
Proceedings of the 2014 IEEE International Symposium on Hardware-Oriented Security and Trust, 2014
Proceedings of the 2014 IEEE International Symposium on Hardware-Oriented Security and Trust, 2014
Joint invariant estimation of RF impairments for reconfigurable Radio Frequency(RF) front-end.
Proceedings of the 2014 IEEE GLOBECOM Workshops, Austin, TX, USA, December 8-12, 2014, 2014
Proceedings of the 51st Annual Design Automation Conference 2014, 2014
Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, 2014
Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014
2013
Local Interpolation-based Polar Format SAR: Algorithm, Hardware Implementation and Design Automation.
J. Signal Process. Syst., 2013
IEEE Trans. Circuits Syst. I Regul. Pap., 2013
IEEE J. Solid State Circuits, 2013
Formal verification of phase-locked loops using reachability analysis and continuization.
Commun. ACM, 2013
Proceedings of the IEEE 11th International New Circuits and Systems Conference, 2013
Proceedings of the 2013 International Joint Conference on Neural Networks, 2013
Neurocomputing and associative memories based on ovenized aluminum nitride resonators.
Proceedings of the 2013 International Joint Conference on Neural Networks, 2013
Accelerating sparse matrix-matrix multiplication with 3D-stacked logic-in-memory hardware.
Proceedings of the IEEE High Performance Extreme Computing Conference, 2013
Indirect performance sensing for on-chip analog self-healing via Bayesian model fusion.
Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 2013
A 3D-stacked logic-in-memory accelerator for application-specific data intensive computing.
Proceedings of the 2013 IEEE International 3D Systems Integration Conference (3DIC), 2013
2012
Proceedings of the VLSI-SoC: From Algorithms to Circuits and System-on-Chip Design, 2012
Cost-effective smart memory implementation for parallel backprojection in computed tomography.
Proceedings of the 20th IEEE/IFIP International Conference on VLSI and System-on-Chip, 2012
Polar format synthetic aperture radar in energy efficient application-specific logic-in-memory.
Proceedings of the 2012 IEEE International Conference on Acoustics, 2012
Statistical design and optimization for adaptive post-silicon tuning of MEMS filters.
Proceedings of the 49th Annual Design Automation Conference 2012, 2012
Proceedings of the 49th Annual Design Automation Conference 2012, 2012
Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012
Proceedings of the 23rd IEEE International Conference on Application-Specific Systems, 2012
2011
IEEE J. Solid State Circuits, 2011
Proceedings of the 37th European Solid-State Circuits Conference, 2011
Proceedings of the 2011 IEEE Custom Integrated Circuits Conference, 2011
2010
Co-Optimization of Circuits, Layout and Lithography for Predictive Technology Scaling Beyond Gratings.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010
Proceedings of the 2010 International Symposium on Low Power Electronics and Design, 2010
Proceedings of the IEEE Custom Integrated Circuits Conference, 2010
Proceedings of the IEEE Custom Integrated Circuits Conference, 2010
2009
Regular Analog/RF Integrated Circuits Design Using Optimization With Recourse Including Ellipsoidal Uncertainty.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009
Proceedings of the 10th International Symposium on Quality of Electronic Design (ISQED 2009), 2009
Integrating dynamic voltage/frequency scaling and adaptive body biasing using test-time voltage selection.
Proceedings of the 2009 International Symposium on Low Power Electronics and Design, 2009
Proceedings of the 46th Design Automation Conference, 2009
Proceedings of the 46th Design Automation Conference, 2009
2008
Quadratic Statistical MAX Approximation for Parametric Yield Estimation of Analog/RF Integrated Circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008
Defining Statistical Timing Sensitivity for Logic Circuits With Large-Scale Process and Environmental Variations.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008
Proc. IEEE, 2008
Proceedings of the Design, Automation and Test in Europe, 2008
Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008
Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008
Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008
2007
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007
Adaptive post-silicon tuning for analog circuits: concept, analysis and optimization.
Proceedings of the 2007 International Conference on Computer-Aided Design, 2007
Proceedings of the 44th Design Automation Conference, 2007
Exact Combinatorial Optimization Methods for Physical Design of Regular Logic Bricks.
Proceedings of the 44th Design Automation Conference, 2007
Efficient Parametric Yield Extraction for Multiple Correlated Non-Normal Performance Distributions of Analog/RF Circuits.
Proceedings of the 44th Design Automation Conference, 2007
2006
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006
Found. Trends Electron. Des. Autom., 2006
Proceedings of the 24th International Conference on Computer Design (ICCD 2006), 2006
Projection-based statistical analysis of full-chip leakage power with non-log-normal distributions.
Proceedings of the 43rd Design Automation Conference, 2006
Proceedings of the 43rd Design Automation Conference, 2006
Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, 2006
2005
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2005
Proceedings of the 23rd International Conference on Computer Design (ICCD 2005), 2005
Proceedings of the 2005 International Conference on Computer-Aided Design, 2005
Proceedings of the 2005 International Conference on Computer-Aided Design, 2005
Parameterized interconnect order reduction with explicit-and-implicit multi-parameter moment matching for inter/intra-die variations.
Proceedings of the 2005 International Conference on Computer-Aided Design, 2005
Defining statistical sensitivity for timing optimization of logic circuits with large-scale process and environmental variations.
Proceedings of the 2005 International Conference on Computer-Aided Design, 2005
Proceedings of the 2005 Design, 2005
Proceedings of the 2005 Design, 2005
Proceedings of the 42nd Design Automation Conference, 2005
Proceedings of the 42nd Design Automation Conference, 2005
Proceedings of the 42nd Design Automation Conference, 2005
A behavioral level approach for nonlinear dynamic modeling of voltage-controlled oscillators.
Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005
2004
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2004
Toward an Integrated Design Methodology for Fault-Tolerant, Multiple Clock/Voltage Integrated Systems.
Proceedings of the 22nd IEEE International Conference on Computer Design: VLSI in Computers & Processors (ICCD 2004), 2004
Proceedings of the 2004 International Conference on Computer-Aided Design, 2004
Proceedings of the 2004 International Conference on Computer-Aided Design, 2004
Asymptotic probability extraction for non-normal distributions of circuit performance.
Proceedings of the 2004 International Conference on Computer-Aided Design, 2004
Proceedings of the 2004 International Conference on Computer-Aided Design, 2004
A power aware system level interconnect design methodology for latency-insensitive systems.
Proceedings of the 2004 International Conference on Computer-Aided Design, 2004
Proceedings of the 2004 Design, 2004
Proceedings of the 2004 Design, 2004
Proceedings of the 41th Design Automation Conference, 2004
Proceedings of the 41th Design Automation Conference, 2004
Proceedings of the 41th Design Automation Conference, 2004
Proceedings of the 41th Design Automation Conference, 2004
Proceedings of the 41th Design Automation Conference, 2004
2003
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2003
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2003
IEEE Des. Test Comput., 2003
Proceedings of the 2003 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2003), 2003
Proceedings of the 2003 International Symposium on Physical Design, 2003
A Hybrid Approach to Nonlinear Macromodel Generation for Time-Varying Analog Circuits.
Proceedings of the 2003 International Conference on Computer-Aided Design, 2003
Proceedings of the 2003 International Conference on Computer-Aided Design, 2003
Proceedings of the 13th ACM Great Lakes Symposium on VLSI 2003, 2003
Proceedings of the 13th ACM Great Lakes Symposium on VLSI 2003, 2003
Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003
Proceedings of the 2003 Design, 2003
Proceedings of the 2003 Design, 2003
Proceedings of the 40th Design Automation Conference, 2003
Proceedings of the 40th Design Automation Conference, 2003
Proceedings of the 40th Design Automation Conference, 2003
Proceedings of the 40th Design Automation Conference, 2003
Proceedings of the IEEE Custom Integrated Circuits Conference, 2003
Proceedings of the IEEE Custom Integrated Circuits Conference, 2003
Proceedings of the 2003 Asia and South Pacific Design Automation Conference, 2003
Proceedings of the 2003 Asia and South Pacific Design Automation Conference, 2003
2002
Accurate Coupling-centric Timing Analysis Incorporating Temporal and Functional Isolation.
VLSI Design, 2002
IEEE Trans. Very Large Scale Integr. Syst., 2002
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2002
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2002
Proceedings of the 3rd International Symposium on Quality of Electronic Design, 2002
Understanding and addressing the impact of wiring congestion during technology mapping.
Proceedings of 2002 International Symposium on Physical Design, 2002
Robust and passive model order reduction for circuits containing susceptance elements.
Proceedings of the 2002 IEEE/ACM International Conference on Computer-aided Design, 2002
Proceedings of the 2002 IEEE/ACM International Conference on Computer-aided Design, 2002
Proceedings of the Field-Programmable Logic and Applications, 2002
Proceedings of the 2002 Design, 2002
Proceedings of the 2002 Design, 2002
Proceedings of the 2002 Design, 2002
Modeling and analysis of regular symmetrically structured power/ground distribution networks.
Proceedings of the 39th Design Automation Conference, 2002
Proceedings of the 39th Design Automation Conference, 2002
2001
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2001
Proc. IEEE, 2001
Assessment of True Worst Case Circuit Performance Under Interconnect Parameter Variations.
Proceedings of the 2nd International Symposium on Quality of Electronic Design (ISQED 2001), 2001
RC(L) interconnect sizing with second order considerations via posynomial programming.
Proceedings of the 2001 International Symposium on Physical Design, 2001
Proceedings of the 2001 International Symposium on Physical Design, 2001
Proceedings of the Conference on Design, Automation and Test in Europe, 2001
Proceedings of the 38th Design Automation Conference, 2001
Proceedings of the 38th Design Automation Conference, 2001
Proceedings of the 38th Design Automation Conference, 2001
Proceedings of the 38th Design Automation Conference, 2001
2000
Proceedings of the 2000 IEEE/ACM International Conference on Computer-Aided Design, 2000
Proceedings of the 37th Conference on Design Automation, 2000
Proceedings of the 37th Conference on Design Automation, 2000
Proceedings of the 37th Conference on Design Automation, 2000
1999
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999
Proceedings of the 1999 IEEE/ACM International Conference on Computer-Aided Design, 1999
Electromagnetic parasitic extraction via a multipole method with hierarchical refinement.
Proceedings of the 1999 IEEE/ACM International Conference on Computer-Aided Design, 1999
Proceedings of the 9th Great Lakes Symposium on VLSI (GLS-VLSI '99), 1999
Proceedings of the 36th Conference on Design Automation, 1999
Proceedings of the 36th Conference on Design Automation, 1999
1998
Analytic termination metrics for pin-to-pin lossy transmission lines with nonlinear drivers.
IEEE Trans. Very Large Scale Integr. Syst., 1998
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1998
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1998
Proceedings of the 1998 International Symposium on Physical Design, 1998
h-gamma: an RC delay metric based on a gamma distribution approximation of the homogeneous response.
Proceedings of the 1998 IEEE/ACM International Conference on Computer-Aided Design, 1998
Proceedings of the 1998 IEEE/ACM International Conference on Computer-Aided Design, 1998
<i>ftd</i>: An Exact Frequency to Time Domain Conversion for Reduced Order RLC Interconnect Models.
Proceedings of the 35th Conference on Design Automation, 1998
Proceedings of the 35th Conference on Design Automation, 1998
Proceedings of the 35th Conference on Design Automation, 1998
Proceedings of the IEEE 1998 Custom Integrated Circuits Conference, 1998
1997
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1997
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1997
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1997
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1997
Proceedings of the 1997 International Symposium on Physical Design, 1997
Proceedings of the Proceedings 1997 International Conference on Computer Design: VLSI in Computers & Processors, 1997
Proceedings of the Proceedings 1997 International Conference on Computer Design: VLSI in Computers & Processors, 1997
Proceedings of the 1997 IEEE/ACM International Conference on Computer-Aided Design, 1997
Proceedings of the 34st Conference on Design Automation, 1997
Proceedings of the 34st Conference on Design Automation, 1997
Proceedings of the 34st Conference on Design Automation, 1997
1996
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1996
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1996
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1996
Proceedings of the 9th International Conference on VLSI Design (VLSI Design 1996), 1996
An Explicit RC-Circuit Delay Approximation Based on the First Three Moments of the Impulse Response.
Proceedings of the 33st Conference on Design Automation, 1996
Proceedings of the 33st Conference on Design Automation, 1996
Proceedings of the 33st Conference on Design Automation, 1996
1995
Proceedings of the 1995 IEEE/ACM International Conference on Computer-Aided Design, 1995
Proceedings of the 1995 IEEE/ACM International Conference on Computer-Aided Design, 1995
Constrained multivariable optimization of transmission lines with general topologies.
Proceedings of the 1995 IEEE/ACM International Conference on Computer-Aided Design, 1995
Proceedings of the 32st Conference on Design Automation, 1995
Proceedings of the 32st Conference on Design Automation, 1995
Proceedings of the 32st Conference on Design Automation, 1995
1994
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1994
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1994
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1994
Enhancing the stability of asymptotic waveform evaluation for digital interconnect circuit applications.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1994
Proceedings of the Proceedings 1994 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1994
Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, 1994
Proceedings of the EDAC - The European Conference on Design Automation, ETC - European Test Conference, EUROASIC - The European Event in ASIC Design, Proceedings, February 28, 1994
Proceedings of the 31st Conference on Design Automation, 1994
Proceedings of the 31st Conference on Design Automation, 1994
1993
An efficient methodology for extraction and simulation of transmission lines for application specific electronic modules.
Proceedings of the 1993 IEEE/ACM International Conference on Computer-Aided Design, 1993
Proceedings of the 30th Design Automation Conference. Dallas, 1993
Proceedings of the 30th Design Automation Conference. Dallas, 1993
1992
Proceedings of the 1992 IEEE/ACM International Conference on Computer-Aided Design, 1992
Proceedings of the 1992 IEEE/ACM International Conference on Computer-Aided Design, 1992
On the Stability of Moment-Matching Approximations in Asymptotic Waveform Evaluation.
Proceedings of the 29th Design Automation Conference, 1992
1991
Proceedings of the 1991 IEEE/ACM International Conference on Computer-Aided Design, 1991
Proceedings of the 28th Design Automation Conference, 1991
1990
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1990
DC Parameterized Piecewise-Function Transistor Models for Bipolar and MOS Logic Stage Delay Evaluation.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 1990
1989
Proceedings of the 26th ACM/IEEE Design Automation Conference, 1989
Proceedings of the 26th ACM/IEEE Design Automation Conference, 1989
1988
Proceedings of the 25th ACM/IEEE Conference on Design Automation, 1988