Dipankar Nag

According to our database, Dipankar Nag authored at least 4 papers between 2014 and 2017.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2017

A 1.2 V, 0.84 pJ/conv.-Step ultra-low power capacitance to digital converter for microphone based auscultation.

Neelakantan Narasimman, Dipankar Nag, Kevin Tshun Chuan Chai, Tony T. Kim

Proceedings of the 2017 IEEE Custom Integrated Circuits Conference, 2017

2016

Digital Compensation Method for the Path Delay Mismatches in GRO-TDC.

Pyoungwon Park, Dipankar Nag, Dan Lei Yan, Muthukumaraswamy Annamalai Arasu

J. Circuits Syst. Comput., 2016

A 6 nV/√Hz high precision Analog Front-End with sub-µV input offset for MEMS accelerometer.

Dipankar Nag

Proceedings of the International Symposium on Integrated Circuits, 2016

2014

High performance ΣΔ closed loop accelerometer.

Dipankar Nag, Kevin Tshun Chuan Chai

Proceedings of the 2014 International Symposium on Integrated Circuits (ISIC), 2014