Dipankar Nag

According to our database1, Dipankar Nag authored at least 4 papers between 2014 and 2017.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2017
A 1.2 V, 0.84 pJ/conv.-Step ultra-low power capacitance to digital converter for microphone based auscultation.
Proceedings of the 2017 IEEE Custom Integrated Circuits Conference, 2017

2016
Digital Compensation Method for the Path Delay Mismatches in GRO-TDC.
J. Circuits Syst. Comput., 2016

A 6 nV/√Hz high precision Analog Front-End with sub-µV input offset for MEMS accelerometer.
Proceedings of the International Symposium on Integrated Circuits, 2016

2014
High performance ΣΔ closed loop accelerometer.
Proceedings of the 2014 International Symposium on Integrated Circuits (ISIC), 2014


  Loading...