Pyoungwon Park

According to our database1, Pyoungwon Park authored at least 8 papers between 2011 and 2022.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2022
Experimental Validation of High Precision Web Handling for a Two-Actuator-Based Roll-to-Roll System.
Sensors, 2022

2016
Digital Compensation Method for the Path Delay Mismatches in GRO-TDC.
J. Circuits Syst. Comput., 2016

2015
A Thermistor-Based Temperature Sensor for a Real-Time Clock With ± 2 ppm Frequency Stability.
IEEE J. Solid State Circuits, 2015

5.10 A 4.7MHz 53μW fully differential CMOS reference clock oscillator with -22dB worst-case PSNR for miniaturized SoCs.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

2014
A resistor-based temperature sensor for a real time clock with ±2ppm frequency stability.
Proceedings of the ESSCIRC 2014, 2014

2012
A 2.4 GHz Fractional-N Frequency Synthesizer With High-OSR ΔΣ Modulator and Nested PLL.
IEEE J. Solid State Circuits, 2012

An all-digital clock generator using a fractionally injection-locked oscillator in 65nm CMOS.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

2011
A fractional-N frequency synthesizer using high-OSR delta-sigma modulator and nested-PLL.
Proceedings of the 2011 IEEE Custom Integrated Circuits Conference, 2011


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