Dong Han Ko

Orcid: 0000-0002-9028-4603

According to our database1, Dong Han Ko authored at least 9 papers between 2021 and 2024.

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Bibliography

2024
Split WL 6T SRAM-Based Bit Serial Computing-in-Memory Macro With High Signal Margin and High Throughput.
IEEE Trans. Circuits Syst. II Express Briefs, April, 2024

A Charge-Domain 4T2C eDRAM Compute-in-Memory Macro With Enhanced Variation Tolerance and Low-Overhead Data Conversion Schemes.
IEEE Trans. Circuits Syst. II Express Briefs, April, 2024

Ferroelectric FET Nonvolatile Sense-Amplifier-Based Flip-Flops for Low Voltage Operation.
IEEE Trans. Circuits Syst. I Regul. Pap., January, 2024

2023
Cross-Coupled Ferroelectric FET-Based Ternary Content Addressable Memory With Energy-Efficient Match Line Scheme.
IEEE Trans. Circuits Syst. I Regul. Pap., February, 2023

Dual-Mode Operations of Self-Rectifying Ferroelectric Tunnel Junction Crosspoint Array for High-Density Integration of IoT Devices.
IEEE J. Solid State Circuits, 2023

2022
A Highly Integrated Crosspoint Array Using Self-rectifying FTJ for Dual-mode Operations: CAM and PUF.
Proceedings of the 48th IEEE European Solid State Circuits Conference, 2022

2021
Comparative Analysis and Energy-Efficient Write Scheme of Ferroelectric FET-Based Memory Cells.
IEEE Access, 2021

High-Performance and Area-Efficient Ferroelectric FET-Based Nonvolatile Flip-Flops.
IEEE Access, 2021

High Performance and Area Efficient Ferroelectric FET based Reconfigurable Logic Circuit.
Proceedings of the 18th International SoC Design Conference, 2021


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