Doran Wilde

Affiliations:
  • Brigham Young University, Provo, Utah, USA


According to our database1, Doran Wilde authored at least 22 papers between 1982 and 2016.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2016
Embedded software education: an RTOS-based approach.
SIGBED Rev., 2016

Efficient processing of phased array radar in sense and avoid application using heterogeneous computing.
Proceedings of the 26th International Conference on Field Programmable Logic and Applications, 2016

2015
Preparing Students for Embedded Software Development: An RTOS-based Approach.
Proceedings of the Workshop on Embedded and Cyber-Physical Systems Education, 2015

2014
Efficient Tree-Based Feature Descriptor and Matching Algorithm.
J. Aerosp. Inf. Syst., 2014

2010
Autonomous Vehicles: A Culminating Design Experience.
Proceedings of the 2010 International Conference on Frontiers in Education: Computer Science & Computer Engineering, 2010

2009
Computing clothoid segments for trajectory generation.
Proceedings of the 2009 IEEE/RSJ International Conference on Intelligent Robots and Systems, 2009

2007
Planning Continuous Curvature Paths Using Constructive Polylines.
J. Aerosp. Comput. Inf. Commun., 2007

Computing Digit Selection Regions for Digit Recurrences.
Proceedings of the IEEE International Conference on Application-Specific Systems, 2007

2004
The Task-Resource Matrix: Control for a Distributed Reconfigurable Multi-Processor Hardware RTOS.
Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms, 2004

2000
Generation of Efficient Nested Loops from Polyhedra.
Int. J. Parallel Program., 2000

Quadratic Control Signals in Linear Systolic Arrays.
Proceedings of the 12th IEEE International Conference on Application-Specific Systems, 2000

1999
Scheduling Structured Systems.
Proceedings of the Euro-Par '99 Parallel Processing, 5th International Euro-Par Conference, Toulouse, France, August 31, 1999

1997
Memory Reuse Analysis in the Polyhedral Model.
Parallel Process. Lett., 1997

Parameterized Polyhedra and Their Vertices.
Int. J. Parallel Program., 1997

1996
A Regular VLSI Array for an Irregular Algorithm.
Proceedings of the Parallel Algorithms for Irregularly Structured Problems, 1996

1995
A Shift Registered-Based Systolic Array for the Unbounded Knapsack Problem.
Parallel Process. Lett., 1995

On deriving data parallel code from a functional program.
Proceedings of IPPS '95, 1995

Deriving Imperative Code from Functional Programs.
Proceedings of the seventh international conference on Functional programming languages and computer architecture, 1995

The naive execution of affine recurrence equations.
Proceedings of the International Conference on Application Specific Array Processors (ASAP'95), 1995

1994
Pure Systolic Array for a Class of Dynamic Dependency Recurrences.
Proceedings of the Parcella 1994, 1994

Regular array synthesis using ALPHA.
Proceedings of the International Conference on Application Specific Array Processors, 1994

1982
A logic minimizer for VLSI PLA design.
Proceedings of the 19th Design Automation Conference, 1982


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