Michael J. Wirthlin

Orcid: 0000-0003-0328-6713

Affiliations:
  • Brigham Young University, UT, USA


According to our database1, Michael J. Wirthlin authored at least 76 papers between 1995 and 2023.

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Bibliography

2023
Low Latency SEU Detection in FPGA CRAM With In-Memory ECC Checking.
IEEE Trans. Circuits Syst. I Regul. Pap., May, 2023

Post-Radiation Fault Analysis of a High Reliability FPGA Linux SoC.
Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2023

2022
The Impact of Terrestrial Radiation on FPGAs in Data Centers.
ACM Trans. Reconfigurable Technol. Syst., 2022

2020
Netlist Analysis and Transformations Using SpyDrNet.
Proceedings of the 19th Python in Science Conference 2020 (SciPy 2020), Virtual Conference, July 6, 2020

Using Partial Duplication With Compare to Detect Radiation-Induced Failure in a Commercial FPGA-Based Networking System.
Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020

2019
Reconfigurable Real-Time Video Pipelines on SRAM-based FPGAs.
Proceedings of the 2019 International Conference on ReConFigurable Computing and FPGAs, 2019

TURTLE: A Low-Cost Fault Injection Platform for SRAM-based FPGAs.
Proceedings of the 2019 International Conference on ReConFigurable Computing and FPGAs, 2019

Impact of Soft Errors on Large-Scale FPGA Cloud Computing.
Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2019

Maverick: A Stand-alone CAD Flow for Xilinx 7-Series FPGAs.
Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2019

Maverick: A Stand-Alone CAD Flow for Partially Reconfigurable FPGA Modules.
Proceedings of the 27th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2019

2018
Improving the Effectiveness of TMR Designs on FPGAs with SEU-Aware Incremental Placement.
Proceedings of the 26th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2018

2017
Rapid implementation of a partially reconfigurable video system with PYNQ.
Proceedings of the 27th International Conference on Field Programmable Logic and Applications, 2017

Center for High-Performance Reconfigurable Computing (CHREC): A Ten-Year Odyssey.
Proceedings of the Computing Frontiers Conference, 2017

2016
Introduction to the special section on FPGAs Technology and Applications.
Comput. Electr. Eng., 2016

An XDL alternative for interfacing RapidSmith and Vivado.
Proceedings of the 26th International Conference on Field Programmable Logic and Applications, 2016

High-speed PCAP configuration scrubbing on Zynq-7000 All Programmable SoCs.
Proceedings of the 26th International Conference on Field Programmable Logic and Applications, 2016

Efficient processing of phased array radar in sense and avoid application using heterogeneous computing.
Proceedings of the 26th International Conference on Field Programmable Logic and Applications, 2016

High-speed programmable FPGA Configuration through JTAG.
Proceedings of the 26th International Conference on Field Programmable Logic and Applications, 2016

SEU Mitigation and Validation of the LEON3 Soft Processor Using Triple Modular Redundancy for Space Processing.
Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2016

2015
The Cibola Flight Experiment.
ACM Trans. Reconfigurable Technol. Syst., 2015

High-Reliability FPGA-Based Systems: Space, High-Energy Physics, and Beyond.
Proc. IEEE, 2015

Introduction to Special issue on Reconfigurable computing and FPGAs.
Microprocess. Microsystems, 2015

Estimating Soft Processor Soft Error Sensitivity through Fault Injection.
Proceedings of the 23rd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2015

2013
Reduced-Precision Redundancy for Reliable FPGA Communications Systems in High-Radiation Environments.
IEEE Trans. Aerosp. Electron. Syst., 2013

Optimization techniques for a high level synthesis implementation of the Sobel filter.
Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2013

Placement of repair circuits for in-field FPGA repair.
Proceedings of the 2013 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2013

Implementing high-performance, low-power FPGA-based optical flow accelerators in C.
Proceedings of the 24th International Conference on Application-Specific Systems, 2013

2012
A Fault Injection Analysis of Linux Operating on an FPGA-Embedded Platform.
Int. J. Reconfigurable Comput., 2012

Reliability of a softcore processor in a commercial SRAM-based FPGA.
Proceedings of the ACM/SIGDA 20th International Symposium on Field Programmable Gate Arrays, 2012

2011
Reduced-Precision Redundancy on FPGAs.
Int. J. Reconfigurable Comput., 2011

FPGA Bootstrapping on PCIe Using Partial Reconfiguration.
Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs, 2011

Software Fault-Tolerant Techniques for Softcore Processors in Commercial SRAM-Based FPGAs.
Proceedings of the ARCS 2011, 2011

2010
Fault Injection Results of Linux Operating on an FPGA Embedded Platform.
Proceedings of the ReConFig'10: 2010 International Conference on Reconfigurable Computing and FPGAs, 2010

Reliable Communications Using FPGAs in High-Radiation Environments - Part I: Characterization.
Proceedings of IEEE International Conference on Communications, 2010

Using Hard Macros to Reduce FPGA Compilation Time.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2010

Increasing Design Productivity through Core Reuse, Meta-data Encapsulation, and Synthesis.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2010

FPGA-2010 pre-conference workshop on open-source for FPGA.
Proceedings of the ACM/SIGDA 18th International Symposium on Field Programmable Gate Arrays, 2010

Voter insertion algorithms for FPGA designs using triple modular redundancy.
Proceedings of the ACM/SIGDA 18th International Symposium on Field Programmable Gate Arrays, 2010

2009
A Test Methodology for Determining Space Readiness of Xilinx SRAM-Based FPGA Devices and Designs.
IEEE Trans. Instrum. Meas., 2009

Bitstream compression through frame removal and partial reconfiguration.
Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009

Noise impact of single-event upsets on an FPGA-based digital filter.
Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009

FPGA partial reconfiguration via configuration scrubbing.
Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009

A multi-layered XML schema and design tool for reusing and integrating FPGA IP.
Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009

On-Orbit Flight Results from the Reconfigurable Cibola Flight Experiment Satellite (CFESat).
Proceedings of the FCCM 2009, 2009

2008
Design, Debug, Deploy: The Creation of Configurable Computing Applications.
J. Signal Process. Syst., 2008

OpenFPGA CoreLib core library interoperability effort.
Parallel Comput., 2008

An Introduction to Radiation-Induced Failure Modes and Related Mitigation Methods For Xilinx SRAM FPGAs.
Proceedings of the 2008 International Conference on Engineering of Reconfigurable Systems & Algorithms, 2008

TMR with More Frequent Voting for Improved FPGA Reliability.
Proceedings of the 2008 International Conference on Engineering of Reconfigurable Systems & Algorithms, 2008

Design Productivity for Configurable Computing.
Proceedings of the 2008 International Conference on Engineering of Reconfigurable Systems & Algorithms, 2008

2007
FPGA Pipeline Synthesis Design Exploration Using Module Selection and Resource Sharing.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007

High-level languages: the future or a passing fad?
Proceedings of the ACM/SIGDA 15th International Symposium on Field Programmable Gate Arrays, 2007

2006
Dynamic reconfiguration for management of radiation-induced faults in FPGAs.
Int. J. Embed. Syst., 2006

Combining module selection and resource sharing for efficient FPGA pipeline synthesis.
Proceedings of the ACM/SIGDA 14th International Symposium on Field Programmable Gate Arrays, 2006

DSynth: A Pipeline Synthesis Environment for FPGAs.
Proceedings of the 14th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2006), 2006

Power Visualization, Analysis, and Optimization Tools for FPGAs.
Proceedings of the 14th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2006), 2006

2005
Senior-Level Embedded Systems Design Project Using FPGAs.
Proceedings of the 2005 International Conference on Microelectronics Systems Education, 2005

Mobile Computing Architectures, Design and Implementation.
Proceedings of the 38th Hawaii International Conference on System Sciences (HICSS-38 2005), 2005

Post Synthesis Level Power Modeling of FPGAs.
Proceedings of the 13th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2005), 2005

2004
Constant Coefficient Multiplication Using Look-Up Tables.
J. VLSI Signal Process., 2004

Improving the reliability of FPGA circuits using triple-modular redundancy (TMR) & efficient voter placement.
Proceedings of the ACM/SIGDA 12th International Symposium on Field Programmable Gate Arrays, 2004

2003
Web-based IP evaluation and distribution using applets.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2003

Actor-Oriented Design of Embedded Hardware and Software Systems.
J. Circuits Syst. Comput., 2003

The Reliability of FPGA Circuit Designs in the Presence of Radiation Induced Configuration Upsets.
Proceedings of the 11th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2003), 2003

2002
Multitasking Hardware on the SLAAC1-V Reconfigurable Computing System.
Proceedings of the Field-Programmable Logic and Applications, 2002

IP delivery for FPGAs using Applets and JHDL.
Proceedings of the 39th Design Automation Conference, 2002

2001
Efficient Constant Coefficient Multiplication Using Advanced FPGA Architectures.
Proceedings of the Field-Programmable Logic and Applications, 2001

Synthesizing RTL Hardware from Java Byte Codes.
Proceedings of the Field-Programmable Logic and Applications, 2001

2000
Designing and Debugging Custom Computing Applications.
IEEE Des. Test Comput., 2000

Measuring the Routing Costs of FPGA Circuit Components.
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2000

Improving the performance and efficiency of an adaptive amplification operation using configurable hardware (poster abstract).
Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2000

Improving the Performance and Efficiency of an Adaptive Amplification Operation Using Configurable Hardware.
Proceedings of the 8th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2000), 2000

1998
Improving functional density using run-time circuit reconfiguration [FPGAs].
IEEE Trans. Very Large Scale Integr. Syst., 1998

1997
Improving Functional Density Through Run-Time Constant Propagation.
Proceedings of the 1997 ACM/SIGDA Fifth International Symposium on Field Programmable Gate Arrays, 1997

1996
Sequencing Run-Time Reconfigured Hardware with Software.
Proceedings of the 1996 Fourth International Symposium on Field Programmable Gate Arrays, 1996

1995
Implementation Approaches for Reconfigurable Logic Applications.
Proceedings of the Field-Programmable Logic and Applications, 5th International Workshop, 1995

A dynamic instruction set computer.
Proceedings of the 3rd IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '95), 1995


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