Douglas Chang

According to our database, Douglas Chang authored at least 8 papers between 1994 and 1999.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

1999

Partitioning Sequential Circuits on Dynamically Reconfigurable FPGAs.

Douglas Chang, Malgorzata Marek-Sadowska

IEEE Trans. Computers, 1999

1998

Partitioning Sequential Circuits on Dynamically Reconfiguable FPGAs.

Douglas Chang, Malgorzata Marek-Sadowska

Proceedings of the 1998 ACM/SIGDA Sixth International Symposium on Field Programmable Gate Arrays, 1998

Functional Scan Chain Testing.

Douglas Chang, Kwang-Ting Cheng, Malgorzata Marek-Sadowska, Mike Tien-Chien Lee

Proceedings of the 1998 Design, 1998

1997

Buffer Minimization and Time-Multiplexed I/O on Dynamically Reconfigurable FPGAs.

Douglas Chang, Malgorzata Marek-Sadowska

Proceedings of the 1997 ACM/SIGDA Fifth International Symposium on Field Programmable Gate Arrays, 1997

A Test Synthesis Approach to Reducing BALLAST DFT Overhead.

Douglas Chang, Mike Tien-Chien Lee, Malgorzata Marek-Sadowska, Takashi Aikyo, Kwang-Ting Cheng

Proceedings of the 34st Conference on Design Automation, 1997

Not necessarily more switches more routability [sic.].

Yu-Liang Wu, Douglas Chang, Malgorzata Marek-Sadowska, Shuji Tsukiyama

Proceedings of the ASP-DAC '97 Asia and South Pacific Design Automation Conference, 1997

1994

On the NP-completeness of regular 2-D FPGA routing architectures and a novel solution.

Yu-Liang Wu, Douglas Chang

Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, 1994

A flow based approach to the pin redistribution problem for multi-chip modules.

Douglas Chang, Teofilo F. Gonzalez, Oscar H. Ibarra

Proceedings of the Fourth Great Lakes Symposium on Design Automation of High Performance VLSI Systems, 1994