Edward D. Moreno

According to our database1, Edward D. Moreno authored at least 70 papers between 1996 and 2021.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Online presence:

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Bibliography

2021
Benchmarking the Keras API on GPU: the use of tensorflow and CNTK libraries as back-end.
Int. J. High Perform. Comput. Netw., 2021

FOGSYS: a system for the implementation of StaaS service in a fog computing using embedded platforms.
Int. J. Grid Util. Comput., 2021

2020
SED-Bench: Benchmark for Simulated Electrical Disturbance.
IEEE Trans. Instrum. Meas., 2020

Challenges and Perspectives on Real-time Singing Voice Synthesis.
RITA, 2020

Towards self-optimisation in fog computing environments.
Int. J. Grid Util. Comput., 2020

Performance analysis of StaaS on IoT devices in fog computing environment using embedded systems.
Int. J. Grid Util. Comput., 2020

A survey on Fog Computing and its research challenges.
Int. J. Grid Util. Comput., 2020

Machine learning algorithms to detect DDoS attacks in SDN.
Concurr. Comput. Pract. Exp., 2020

A WEB tool for identifying and monitoring technology trends.
Proceedings of the EATIS 2020: 10th Euro American Conference on Telematics and Information Systems, 2020

Convolutional neural network on embedded system: a technological and scientific mapping.
Proceedings of the EATIS 2020: 10th Euro American Conference on Telematics and Information Systems, 2020

Convolutional neural network libraries benchmarking: a systematic mapping.
Proceedings of the EATIS 2020: 10th Euro American Conference on Telematics and Information Systems, 2020

2019
Cache replication for information-centric networks through programmable networks.
Int. J. Grid Util. Comput., 2019

New advances in high-performance computing systems.
Concurr. Comput. Pract. Exp., 2019

A comparison of two embedded systems to detect electrical disturbances using decision tree algorithm.
Proceedings of the 32nd Symposium on Integrated Circuits and Systems Design, 2019

A Framework for Network Intrusion Detection using Network Programmability and Data Stream Clustering Machine Learning Algorithms.
Proceedings of the Preprints of Communication Papers of the 2019 Federated Conference on Computer Science and Information Systems, 2019

2018
Dark-Silicon Aware Design Space Exploration.
J. Parallel Distributed Comput., 2018

An Approach to the Performance and Efficiency Power Analysis on Embedded Devices Using Asterisk.
J. Comput. Sci., 2018

Resources Optimization in ICNs through Distributed Cache Using Software Defined Networking - SDN.
Proceedings of the Symposium on High Performance Computing Systems, 2018

Performance Evaluation to Provide StaaS to IoT Devices in Fog Computing Environment.
Proceedings of the Symposium on High Performance Computing Systems, 2018

Hybrid Storage Architecture for Internet of Things.
Proceedings of the Symposium on High Performance Computing Systems, 2018

Intrusion Detection via MLP Neural Network Using an Arduino Embedded System.
Proceedings of the VIII Brazilian Symposium on Computing Systems Engineering, 2018

Evaluation of Cache for Bandwidth Optimization in ICN Through Software-Defined Networks.
Proceedings of the 2018 IEEE Symposium on Computers and Communications, 2018

A Failure Detector for Ambient Assisted Living.
Proceedings of the 2018 IEEE Symposium on Computers and Communications, 2018

Towards a Hybrid Storage Architecture for IoT.
Proceedings of the 2018 IEEE Symposium on Computers and Communications, 2018

Internet of Things: A Survey on Communication Protocol Security.
Proceedings of the Euro American Conference on Telematics and Information Systems, 2018

A comparative analysis of protocols for IoT network management.
Proceedings of the Euro American Conference on Telematics and Information Systems, 2018

Intrusion Detection via Multilayer Perceptron using a Low Power Device.
Proceedings of the Euro American Conference on Telematics and Information Systems, 2018

2017
A microcontroller multicore in FPGAs: detailed architecture and case studies of embedded critical applications.
Int. J. Grid Util. Comput., 2017

Performance analysis of Linux containers for high performance computing applications.
Int. J. Grid Util. Comput., 2017

A Programmable Network Architecture for Information Centric Network using Data Replication in Private Clouds.
Proceedings of the 26th IEEE International Conference on Enabling Technologies: Infrastructure for Collaborative Enterprises, 2017

A Security Approach using SIP Protocol in Imbedded Systems.
Proceedings of the 13th International Conference on Web Information Systems and Technologies, 2017

Current Consumption Analysis of AES and PRESENT Encryption Algorithms in FPGA Using the Welch Method.
Proceedings of the Security in Computing and Communications - 5th International Symposium, 2017

Comparing the performance of OS-level virtualization tools in SoC-based systems: The case of I/O-bound applications.
Proceedings of the 2017 IEEE Symposium on Computers and Communications, 2017

Performance Evaluation of OS-Level Virtualization Solutions for HPC Purposes on SoC-Based Systems.
Proceedings of the 31st IEEE International Conference on Advanced Information Networking and Applications, 2017

2016
A virtual machine scheduler based on CPU and I/O-bound features for energy-aware in high performance computing clouds.
Comput. Electr. Eng., 2016

Performance evaluation of a lightweight virtualization solution for HPC I/O scenarios.
Proceedings of the 2016 IEEE International Conference on Systems, Man, and Cybernetics, 2016

On the Dark Silicon Automatic Evaluation on Multicore Processors.
Proceedings of the 28th International Symposium on Computer Architecture and High Performance Computing, 2016

A management architectural pattern for adaptation system in Internet of Things.
Proceedings of the 2016 International Wireless Communications and Mobile Computing Conference (IWCMC), 2016

2015
Impact of Asymmetric Encryption Algorithms in a VANET.
J. Comput. Sci., 2015

Energy Characterization of a Security Module in ARM Processor.
Int. J. Netw. Secur., 2015

GoThings - An Application-layer Gateway Architecture for the Internet of Things.
Proceedings of the WEBIST 2015, 2015

Proposal of a Standard Vocabulary for Services Discovery on the Internet of Things.
Proceedings of the WEBIST 2015, 2015

Problems and Limitations in the Design of a Web-API for IoT.
Proceedings of the WEBIST 2015, 2015

Performance Evaluation of Hypervisors for HPC Applications.
Proceedings of the 2015 IEEE International Conference on Systems, 2015

A Modular Multicore Architecture in FPGAs for Embedded Critical Applications.
Proceedings of the Ninth International Conference on Complex, 2015

Performance Analysis of LXC for HPC Environments.
Proceedings of the Ninth International Conference on Complex, 2015

2014
Compressing code for embedded systems.
Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014

2013
A new code compression algorithm and its decompressor in FPGA-based hardware.
Proceedings of the 26th Symposium on Integrated Circuits and Systems Design, 2013

Specific processor in FPGA for BLAKE algorithm.
Proceedings of the 4th IEEE Latin American Symposium on Circuits and Systems, 2013

Code compression using Multi-Level Dictionary.
Proceedings of the 4th IEEE Latin American Symposium on Circuits and Systems, 2013

Multi-Level Dictionary Used in Code Compression for Embedded Systems.
Proceedings of the 2013 Data Compression Conference, 2013

2012
CPB-ARM - A New Code Compression Method for Embedded Systems.
Proceedings of the 13th Symposium on Computer Systems, 2012

Code Compression in ARM Embedded Systems Using Multiple Dictionaries.
Proceedings of the 15th IEEE International Conference on Computational Science and Engineering, 2012

Cache performance analysis of SHA-3 hashing algorithm (BLAKE) and SHA-1.
Proceedings of the 2012 XXXVIII Conferencia Latinoamericana En Informatica (CLEI), 2012

2011
A Flexible and Parameterized Architecture for Multicore Microcontroller.
J. Comput., 2011

An Approach for Code Compression in Run Time for Embedded Systems - A Preliminary Results.
Proceedings of the Algorithms and Architectures for Parallel Processing, 2011

2010
Performance Issues on Integration of Security Services.
Trans. Comput. Sci., 2010

A Control Design Approach for Controlling an Autonomous Vehicle with FPGAs.
J. Comput., 2010

2009
A Hardware Architecture for Integrated-Security Services.
Trans. Comput. Sci., 2009

A VHDL-based protocol controller for NCAP processors.
Comput. Stand. Interfaces, 2009

Architectural impact of the SVG-based graphical components in web applications.
Comput. Stand. Interfaces, 2009

2007
Load Indices on Heterogeneous Systems- Past, Present and Future.
J. Convergence Inf. Technol., 2007

Impact of the DES and AES Algorithms on PERS (A Specific Processor for Sensor Networks).
Proceedings of the Second International Conference on Systems and Networks Communications (ICSNC 2007), 2007

2005
A VLIW-based cryptoprocessor on FPGAs architecture and performance issues (abstract only).
Proceedings of the ACM/SIGDA 13th International Symposium on Field Programmable Gate Arrays, 2005

2002
Hash Join Algorithms on SMPs Clusters: Effects of Netcaches on Its Scalability and Performance.
J. Inf. Sci. Eng., 2002

1998
Improvements on bus technology will affect the benefits of remote caches in CC-NUMA architectures.
Proceedings of the Computers and Their Applications (CATA-98), 1998

1997
Tuning Shared Network Cache Size vs. Second-Level Cache Size in Clusters-Based Multiprocessors.
Proceedings of the Parallel Computing Technologies, 1997

Efficiency of remote access caches in future SMP-based CC-NUMA multiprocessors: initial results.
Proceedings of the 1997 International Symposium on Parallel Architectures, 1997

Prefetching and Multithreading Performance in Bus-Based Multiprocessors with Petri Nets.
Proceedings of the Euro-Par '97 Parallel Processing, 1997

1996
Performance evaluation of the fixed sequential prefetching on a bus-based multiprocessor: preliminary results.
Proceedings of the 1996 International Symposium on Parallel Architectures, 1996


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