Eknath Sarkar
According to our database1,
Eknath Sarkar
authored at least 5 papers
between 2023 and 2025.
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Bibliography
2025
Proceedings of the IEEE International Reliability Physics Symposium, 2025
Analog In-Memory-Compute with Multi-bit Silicon Ferro FinFET Array for Improved Energy and Area Efficiency.
Proceedings of the IEEE International Memory Workshop, 2025
2024
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024
2023
First Demonstration of a-IGZO GAA Nanosheet FETs Featuring Achievable SS=61mV/dec, Ioff<10<sup>-7</sup> μA/μm, DIBL =44mV/V, Positive VT, and Process Temp. of 300 °C.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023