Erik H. D'Hollander
Orcid: 0009-0003-3009-7106Affiliations:
- Ghent University, Belgium
According to our database1,
Erik H. D'Hollander
authored at least 53 papers
between 1983 and 2023.
Collaborative distances:
Collaborative distances:
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Bibliography
2023
Proceedings of the 13th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, 2023
2019
Algorithms, 2019
Proceedings of the Parallel Computing: Technology Trends, 2019
2018
Proceedings of the 2018 4th International Conference on Cloud Computing Technologies and Applications, 2018
2017
Proceedings of the Parallel Computing is Everywhere, 2017
Proceedings of the International Conference on Field Programmable Technology, 2017
2016
SIGARCH Comput. Archit. News, 2016
2015
Proceedings of the Parallel Computing: On the Road to Exascale, 2015
2013
Performance Modeling for FPGAs: Extending the Roofline Model with High-Level Synthesis Tools.
Int. J. Reconfigurable Comput., 2013
Proceedings of the Parallel Computing: Accelerating Computational Science and Engineering (CSE), 2013
ParaFPGA 2013: Harnessing Programs, Power and Performance in Parallel FPGA applications.
Proceedings of the Parallel Computing: Accelerating Computational Science and Engineering (CSE), 2013
Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013
Proceedings of the 2013 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2013
2012
Proceedings of the Transition of HPC Towards Exascale Computing, 2012
2011
ParaFPGA 2011 - High Performance Computing with Multiple FPGAs: Design Methodology and Applications.
Proceedings of the Applications, Tools and Techniques on the Road to Exascale Computing, Proceedings of the conference ParCo 2011, 31 August, 2011
2009
ACM Trans. Design Autom. Electr. Syst., 2009
Proceedings of the Parallel Computing: From Multicores and GPU's to Petascale, 2009
2008
J. Instr. Level Parallelism, 2008
Proceedings of the High Speed and Large Scale Scientific Computing - Selected Papers from the High Performance Computing Workshop, Cetraro, Italy, June 30, 2008
Embedding Smart Buffers for Window Operations in a Stream-Oriented C-to-VHDL Compiler.
Proceedings of the 4th IEEE International Symposium on Electronic Design, 2008
2007
Finding and Applying Loop Transformations for Generating Optimized FPGA Implementations.
Trans. High Perform. Embed. Archit. Compil., 2007
Parallel Computing with FPGAs - Concepts and Applications.
Proceedings of the Parallel Computing: Architectures, 2007
2006
Proceedings of the High Performance Computing and Communications, 2006
Intermediately executed code is the key to find refactorings that improve temporal data locality.
Proceedings of the Third Conference on Computing Frontiers, 2006
2005
RDVIS: A Tool that Visualizes the Causes of Low Locality and Hints Program Optimizations.
Proceedings of the Computational Science, 2005
2004
Proceedings of the 8th International Conference on Information Visualisation, 2004
Proceedings of the 33rd International Conference on Parallel Processing (ICPP 2004), 2004
Proceedings of the Computational Science, 2004
2002
Visualization Enables the Programmer to Reduce Cache Misses.
Proceedings of the International Conference on Parallel and Distributed Computing Systems, 2002
2001
J. Vis. Lang. Comput., 2001
Proceedings of the International Conference on Information Visualisation, 2001
2000
J. Univers. Comput. Sci., 2000
Proceedings of the 2000 International Conference on Parallel Processing, 2000
Proceedings of the Euro-Par 2000, Parallel Processing, 6th International Euro-Par Conference, Munich, Germany, August 29, 2000
1999
Proceedings of the Recent Advances in Parallel Virtual Machine and Message Passing Interface, 1999
1998
1997
Proceedings of the High-Performance Computing and Networking, 1997
1996
PVM Code Generator for the Fortran Parallel Transformer.
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 1996
1994
Proceedings of the PARLE '94: Parallel Architectures and Languages Europe, 1994
Proceedings of the Proceedings 1994 International Conference on Parallel and Distributed Systems, 1994
1993
Proceedings of the PARLE '93, 1993
Performance Modeling of Microkernel Thread Schedulers for Shared Memory Multiprocessors.
Proceedings of the PARLE '93, 1993
1992
IEEE Trans. Parallel Distributed Syst., 1992
1991
Directed Taskgraph Scheduling Using Simulated Annealing.
Proceedings of the International Conference on Parallel Processing, 1991
1989
Partitioning and Labeling of Index Sets in DO Loops with Constant Dependence Vectors.
Proceedings of the International Conference on Parallel Processing, 1989
1987
Implementation of An Automatic Program Partitioner on a Homogeneous Multiprocessor.
Proceedings of the International Conference on Parallel Processing, 1987
1983
Proceedings of the First European Simulation Congress ESC 83, 1983