Koen De Bosschere

According to our database1, Koen De Bosschere authored at least 194 papers between 1991 and 2017.

Collaborative distances:

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

Homepages:

On csauthors.net:

Bibliography

2017
Calling hardware procedures in a reconfigurable accelerator using RPC-FPGA.
Proceedings of the International Conference on Field Programmable Technology, 2017

Taming Parallelism in a Multi-Variant Execution Environment.
Proceedings of the Twelfth European Conference on Computer Systems, 2017

2016
Evaluation of dynamic binary translation techniques for full system virtualisation on ARMv7-A.
Journal of Systems Architecture - Embedded Systems Design, 2016

Link-time smart card code hardening.
Int. J. Inf. Sec., 2016

SOFIA: Software and control flow integrity architecture.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

2014
Pushing Java Type Obfuscation to the Limit.
IEEE Trans. Dependable Sec. Comput., 2014

2013
Formal virtualization requirements for the ARM architecture.
Journal of Systems Architecture - Embedded Systems Design, 2013

Protecting Your Software Updates.
IEEE Security & Privacy, 2013

Mitigating Smart Card Fault Injection with Link-Time Code Rewriting: A Feasibility Study.
Proceedings of the Financial Cryptography and Data Security, 2013

2012
Introduction to the special issue on high-performance and embedded architectures and compilers.
TACO, 2012

DNS Tunneling for Network Penetration.
Proceedings of the Information Security and Cryptology - ICISC 2012, 2012

GHUMVEE: Efficient, Effective, and Flexible Replication.
Proceedings of the Foundations and Practice of Security - 5th International Symposium, 2012

A Novel Obfuscation: Class Hierarchy Flattening.
Proceedings of the Foundations and Practice of Security - 5th International Symposium, 2012

2010
A profile-based tool for finding pipeline parallelism in sequential programs.
Parallel Computing, 2010

Accelerating Multiple Sequence Alignment with the Cell BE Processor.
Comput. J., 2010

Implicit hints: Embedding hint bits in programs without ISA changes.
Proceedings of the 28th International Conference on Computer Design, 2010

Compilation and virtualization in the HiPEAC vision.
Proceedings of the 47th Design Automation Conference, 2010

The Paralax infrastructure: automatic parallelization with a helping hand.
Proceedings of the 19th International Conference on Parallel Architecture and Compilation Techniques, 2010

2009
System-scenario-based design of dynamic embedded systems.
ACM Trans. Design Autom. Electr. Syst., 2009

Linux Kernel Compaction through Cold Code Swapping.
Trans. HiPEAC, 2009

Practical Mitigations for Timing-Based Side-Channel Attacks on Modern x86 Processors.
Proceedings of the 30th IEEE Symposium on Security and Privacy (S&P 2009), 2009

Towards automatic program partitioning.
Proceedings of the 6th Conference on Computing Frontiers, 2009

2008
Behavior-Based Branch Prediction by Dynamically Clustering Branch Instructions.
J. Inf. Sci. Eng., 2008

Upcoming Computing System Challenges - The HiPEAC Vision (Anstehende Herausforderungen der Computer Industrie - Die HiPEAC Vision).
it - Information Technology, 2008

Memory footprint reduction for embedded systems.
Proceedings of the 11th International Workshop on Software and Compilers for Embedded Systems, 2008

Extracting coarse-grain parallelism in general-purpose programs.
Proceedings of the 13th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, 2008

Towards Tamper Resistant Code Encryption: Practice and Experience.
Proceedings of the Information Security Practice and Experience, 2008

Instruction Set Limitation in Support of Software Diversity.
Proceedings of the Information Security and Cryptology, 2008

Experiences with Parallelizing a Bio-informatics Program on the Cell BE.
Proceedings of the High Performance Embedded Architectures and Compilers, 2008

Topic 4: High Performance Architectures and Compilers.
Proceedings of the Euro-Par 2008, 2008

08441 Abstracts Collection - Emerging Uses and Paradigms for Dynamic Binary Translation.
Proceedings of the Emerging Uses and Paradigms for Dynamic Binary Translation, 26.10., 2008

08441 Final Report - Emerging Uses and Paradigms for Dynamic Binary Translation.
Proceedings of the Emerging Uses and Paradigms for Dynamic Binary Translation, 26.10., 2008

Constructing Optimal XOR-Functions to Minimize Cache Conflict Misses.
Proceedings of the Architecture of Computing Systems, 2008

2007
A practical interprocedural dominance algorithm.
ACM Trans. Program. Lang. Syst., 2007

GCH: Hints for Triggering Garbage Collections.
Trans. HiPEAC, 2007

High-Performance Embedded Architecture and Compilation Roadmap.
Trans. HiPEAC, 2007

Link-time compaction and optimization of ARM executables.
ACM Trans. Embedded Comput. Syst., 2007

Automated reduction of the memory footprint of the Linux kernel.
ACM Trans. Embedded Comput. Syst., 2007

Java object header elimination for reduced memory consumption in 64-bit virtual machines.
TACO, 2007

Function level parallelism driven by data dependencies.
SIGARCH Computer Architecture News, 2007

Clustered indexing for branch predictors.
Microprocessors and Microsystems, 2007

Exploiting program phase behavior for energy reduction on multi-configuration processors.
Journal of Systems Architecture, 2007

Whole-program linear-constant analysis with applications to link-time optimization.
Proceedings of the 10th International Workshop on Software and Compilers for Embedded Systems, 2007

Using hpm-sampling to drive dynamic compilation.
Proceedings of the 22nd Annual ACM SIGPLAN Conference on Object-Oriented Programming, 2007

Exploiting Video Stream Similarity for Energy-Efficient Decoding.
Proceedings of the Advances in Multimedia Modeling, 2007

Run-Time Randomization to Mitigate Tampering.
Proceedings of the Advances in Information and Computer Security, 2007

Object-Relative Addressing: Compressed Pointers in 64-Bit Java Virtual Machines.
Proceedings of the ECOOP 2007 - Object-Oriented Programming, 21st European Conference, Berlin, Germany, July 30, 2007

Program obfuscation: a quantitative approach.
Proceedings of the 3th ACM Workshop on Quality of Protection, 2007

2006
64-bit versus 32-bit Virtual Machines for Java.
Softw., Pract. Exper., 2006

On the expressiveness of timed coordination models.
Sci. Comput. Program., 2006

Yet shorter warmup by combining no-state-loss and MRRL for sampled LRU cache simulation.
Journal of Systems and Software, 2006

Bidirectional liveness analysis, or how less than half of the Alpha's registers are used.
Journal of Systems Architecture, 2006

Improved composite confidence mechanisms for a perceptron branch predictor.
Journal of Systems Architecture, 2006

On the Effectiveness of Source Code Transformations for Binary Obfuscation.
Proceedings of the International Conference on Software Engineering Research and Practice & Conference on Programming Languages and Compilers, 2006

LOCO: an interactive code (De)obfuscation tool.
Proceedings of the 2006 ACM SIGPLAN Workshop on Partial Evaluation and Semantics-based Program Manipulation, 2006

Javana: a system for building customized Java program analysis tools.
Proceedings of the 21th Annual ACM SIGPLAN Conference on Object-Oriented Programming, 2006

Building Java program analysis tools using Javana.
Proceedings of the Companion to the 21th Annual ACM SIGPLAN Conference on Object-Oriented Programming, 2006

On the Impact of OS and Linker Effects on Level-2 Cache Performance.
Proceedings of the 14th International Symposium on Modeling, 2006

Understanding Obfuscated Code.
Proceedings of the 14th International Conference on Program Comprehension (ICPC 2006), 2006

A Model for Self-Modifying Code.
Proceedings of the Information Hiding, 8th International Workshop, 2006

Accurate memory data flow modeling in statistical simulation.
Proceedings of the 20th Annual International Conference on Supercomputing, 2006

Topic 7: Parallel Computer Architecture and Instruction Level Parallelism.
Proceedings of the Euro-Par 2006, Parallel Processing, 12th International Euro-Par Conference, Dresden, Germany, August 28, 2006

Efficient design space exploration of high performance embedded out-of-order processors.
Proceedings of the Conference on Design, Automation and Test in Europe, 2006

Space-Efficient 64-bit Java Objects through Selective Typed Virtual Addressing.
Proceedings of the Fourth IEEE/ACM International Symposium on Code Generation and Optimization (CGO 2006), 2006

Energy Consumption for Transport of Control Information on a Segmented Software-Controlled Communication Architecture.
Proceedings of the Reconfigurable Computing: Architectures and Applications, 2006

NSL-BLRL: Efficient CacheWarmup for Sampled Processor Simulation.
Proceedings of the Proceedings 39th Annual Simulation Symposium (ANSS-39 2006), 2006

Opaque Predicates Detection by Abstract Interpretation.
Proceedings of the Algebraic Methodology and Software Technology, 2006

Performance prediction based on inherent program similarity.
Proceedings of the 15th International Conference on Parallel Architecture and Compilation Techniques (PACT 2006), 2006

2005
Link-time binary rewriting techniques for program compaction.
ACM Trans. Program. Lang. Syst., 2005

XOR-Based Hash Functions.
IEEE Trans. Computers, 2005

Optimal sample length for efficient cache simulation.
Journal of Systems Architecture, 2005

2FAR: A 2bcgskew Predictor Fused by an Alloyed Redundant History Skewed Perceptron Branch Predictor.
J. Instruction-Level Parallelism, 2005

BLRL: Accurate and Efficient Warmup for Sampled Processor Simulation.
Comput. J., 2005

Software Protection Through Dynamic Code Mutation.
Proceedings of the Information Security Applications, 6th International Workshop, 2005

Offline Phase Analysis and Optimization for Multi-configuration Processors.
Proceedings of the Embedded Computer Systems: Architectures, 2005

LANCET: a nifty code editing tool.
Proceedings of the 2005 ACM SIGPLAN-SIGSOFT Workshop on Program Analysis For Software Tools and Engineering, 2005

System-wide compaction and specialization of the linux kernel.
Proceedings of the 2005 ACM SIGPLAN/SIGBED Conference on Languages, 2005

Garbage Collection Hints.
Proceedings of the High Performance Embedded Architectures and Compilers, 2005

A Detailed Study on Phase Predictors.
Proceedings of the Euro-Par 2005, Parallel Processing, 11th International Euro-Par Conference, Lisbon, Portugal, August 30, 2005

Hybrid static-dynamic attacks against software protection mechanisms.
Proceedings of the Fifth ACM Workshop on Digital Rights Management, 2005

Backtracking and dynamic patching for free.
Proceedings of the Sixth International Workshop on Automated Debugging, 2005

Comparing Low-Level Behavior of SPEC CPU and Java Workloads.
Proceedings of the Advances in Computer Systems Architecture, 10th Asia-Pacific Conference, 2005

Using Decision Trees to Improve Program-Based and Profile-Based Static Branch Prediction.
Proceedings of the Advances in Computer Systems Architecture, 10th Asia-Pacific Conference, 2005

2004
JaRec: a portable record/replay environment for multi-threaded Java applications.
Softw., Pract. Exper., 2004

Speeding Up Architectural Simulations for High-Performance Processors.
Simulation, 2004

Efficient simulation of trace samples on parallel machines.
Parallel Computing, 2004

How accurate should early design stage power/performance tools be? A case study with statistical simulation.
Journal of Systems and Software, 2004

On the Expressiveness of Relative-Timed Coordination Models.
Electr. Notes Theor. Comput. Sci., 2004

On Generating Set Index Functions for Randomized Caches.
Comput. J., 2004

Efficient architectural design of high performance microprocessors.
Advances in Computers, 2004

Low-level behavioral analysis of the JVT/AVC decoder.
Proceedings of the Visual Communications and Image Processing 2004, 2004

The design and implementation of FIT: a flexible instrumentation toolkit.
Proceedings of the 2004 ACM SIGPLAN-SIGSOFT Workshop on Program Analysis For Software Tools and Engineering, 2004

Method-level phase behavior in java workloads.
Proceedings of the 19th Annual ACM SIGPLAN Conference on Object-Oriented Programming, 2004

Bottleneck analysis in java applications using hardware performance monitors.
Proceedings of the Companion to the 19th Annual ACM SIGPLAN Conference on Object-Oriented Programming, 2004

Link-time optimization of ARM binaries.
Proceedings of the 2004 ACM SIGPLAN/SIGBED Conference on Languages, 2004

Eccentric and fragile benchmarks.
Proceedings of the 2004 IEEE International Symposium on Performance Analysis of Systems and Software, 2004

Control Flow Modeling in Statistical Simulation for Accurate and Efficient Processor Design Studies.
Proceedings of the 31st International Symposium on Computer Architecture (ISCA 2004), 2004

Steganography for Executables and Code Transformation Signatures.
Proceedings of the Information Security and Cryptology, 2004

Towards an Extensible Context Ontology for Ambient Intelligence.
Proceedings of the Ambient Intelligence: Second European Symposium, 2004

Detecting Data Races in Sequential Programs with DIOTA.
Proceedings of the Euro-Par 2004 Parallel Processing, 2004

Link-Time Optimization of IA64 Binaries.
Proceedings of the Euro-Par 2004 Parallel Processing, 2004

Software piracy prevention through diversity.
Proceedings of the 2004 ACM Workshop on Digital Rights Management 2004, Washington, 2004

Link-Time Compaction of MIPS Programs.
Proceedings of the International Conference on Embedded Systems and Applications, 2004

2003
Suspension Terms as a Means for Meta-coordination in the muLog Coordination Framework.
The Journal of Supercomputing, 2003

Statistical Simulation: Adding Efficiency to the Computer Designer's Toolbox.
IEEE Micro, 2003

Highly accurate and efficient evaluation of randomising set index functions.
Journal of Systems Architecture, 2003

Quantifying behavioral differences between multimedia and general-purpose workloads.
Journal of Systems Architecture, 2003

Quantifying the Impact of Input Data Sets on Program Behavior and its Applications.
J. Instruction-Level Parallelism, 2003

Debugging shared memory parallel programs using record/replay.
Future Generation Comp. Syst., 2003

Designing Computer Architecture Research Workloads.
IEEE Computer, 2003

Introduction.
Commun. ACM, 2003

Record/replay for nondeterministic program executions.
Commun. ACM, 2003

Comparing Multiported Cache Schemes.
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2003

TORNADO: A Novel Input Replay Tool.
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2003

Trade-offs for Skewed-Associative Caches.
Proceedings of the Parallel Computing: Software Technology, 2003

An efficient data race detector backend for DIOTA.
Proceedings of the Parallel Computing: Software Technology, 2003

How java programs interact with virtual machines at the microarchitectural level.
Proceedings of the 2003 ACM SIGPLAN Conference on Object-Oriented Programming Systems, 2003

On the side-effects of code abstraction.
Proceedings of the 2003 Conference on Languages, 2003

Trace Substitution.
Proceedings of the Euro-Par 2003. Parallel Processing, 2003

Efficient Microprocessor Design Space Exploration through Statistical Simulatio.
Proceedings of the Proceedings 36th Annual Simulation Symposium (ANSS-36 2003), Orlando, Florida, USA, March 30, 2003

2002
Bounding the number of segment histories during data race detection.
Parallel Computing, 2002

An Address Transformation Combining Block- and Word-Interleaving.
Computer Architecture Letters, 2002

Non-Intrusive Detection of Synchronization Errors Using Execution Replay.
Autom. Softw. Eng., 2002

Record/Play in the Presence of Benign Data Races.
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2002

Sifting out the mud: low level C++ code reuse.
Proceedings of the 2002 ACM SIGPLAN Conference on Object-Oriented Programming Systems, 2002

A Comparative Study of Redundancy in Trace Caches (Research Note).
Proceedings of the Euro-Par 2002, 2002

Independent Hashing as Confidence Mechanism for Value Predictors in Microprocessors.
Proceedings of the Euro-Par 2002, 2002

Workload Design: Selecting Representative Program-Input Pairs.
Proceedings of the 2002 International Conference on Parallel Architectures and Compilation Techniques (PACT 2002), 2002

2001
alto: a link-time optimizer for the Compaq Alpha.
Softw., Pract. Exper., 2001

Synchronous coordination in the Log coordination model.
Proceedings of the 2001 ACM Symposium on Applied Computing (SAC), 2001

Combining Global Code and Data Compaction.
Proceedings of The Workshop on Languages, 2001

TRaDe: A Topological Approach to On-the-Fly Race Detection in Java Programs.
Proceedings of the 1st Java Virtual Machine Research and Technology Symposium, 2001

Efficient profile-based evaluation of randomising set index functions for cache memories.
Proceedings of the 2001 IEEE International Symposium on Performance Analysis of Systems and Software, 2001

Early design phase power/performance modeling through statistical simulation.
Proceedings of the 2001 IEEE International Symposium on Performance Analysis of Systems and Software, 2001

Cyclic Debugging Using Execution Replay.
Proceedings of the Computational Science - ICCS 2001, 2001

TRaDe: Data Race Detection for Java.
Proceedings of the Computational Science - ICCS 2001, 2001

Differential FCM: Increasing Value Prediction Accuracy by Improving Table Usage Efficiency.
Proceedings of the Seventh International Symposium on High-Performance Computer Architecture (HPCA'01), 2001

Accordion Clocks: Logical Clocks for Data Race Detection.
Proceedings of the Euro-Par 2001: Parallel Processing, 2001

Hybrid Analytical-Statistical Modeling for Efficiently Exploring Architecture and Workload Design Spaces.
Proceedings of the 2001 International Conference on Parallel Architectures and Compilation Techniques (PACT 2001), 2001

2000
Blackboard Relations in the µLog Coordination Model.
New Generation Comput., 2000

Early design stage exploration of fixed-length block structured architectures.
Journal of Systems Architecture, 2000

Execution Replay and Debugging of Distributed Multi-threaded Parallel Programs.
Computers and Artificial Intelligence, 2000

On the Static Analysis of Indirect Control Transfers in Binaries.
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2000

Meta-coordination in the µLog Coordination Model.
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2000

Performance analysis through synthetic trace generation.
ISPASS, 2000

A Comparison of Locality-Based and Recency-Based Replacement Policies.
Proceedings of the High Performance Computing, Third International Symposium, 2000

A Technique for High Bandwidth and Deterministic Low Latency Load/Store Accesses to Multiple Cache Banks.
Proceedings of the Sixth International Symposium on High-Performance Computer Architecture, 2000

On Timed Coordination Languages.
Proceedings of the Coordination Languages and Models, 4th International Conference, 2000

Execution replay and debugging.
AADEBUG, 2000

Non-intrusive on-the-fly data race detection using execution replay.
AADEBUG, 2000

On the Feasibility of Fixed-Length Block Structured Architectures.
Proceedings of the 5th Australasian Computer Architecture Conference (ACAC 2000), 31 January, 2000

1999
RecPlay: A Fully Integrated Practical Record/Replay System.
ACM Trans. Comput. Syst., 1999

Exploitable levels of ILP in future processors.
Journal of Systems Architecture, 1999

A fast, cache-aware algorithm for the calculation of radiological paths exploiting subword parallelism.
Journal of Systems Architecture, 1999

LogiMOO: An Extensible Multi-user Virtual World with Natural Language Control.
J. Log. Program., 1999

MPL*: Efficient Record/Play of Nondeterministic Features of Message Passing Libraries.
Proceedings of the Recent Advances in Parallel Virtual Machine and Message Passing Interface, 1999

Execution replay for an MPI-based multi-threaded runtime system.
Proceedings of the Parallel Computing: Fundamentals & Applications, 1999

Increasing the efficiency of value prediction in future processors by predicting less.
Proceedings of the Parallel Computing: Fundamentals & Applications, 1999

Estimating IPC of a block structured instruction set architecture in an early design stage.
Proceedings of the Parallel Computing: Fundamentals & Applications, 1999

Investigating the Implementation of a Block Structured Architecture in an Early Design Stage.
Proceedings of the 25th EUROMICRO '99 Conference, 1999

1998
On the Use of Subword Parallelism in Medical Image Processing.
Parallel Computing, 1998

TARILAN: an embedded functional data processing language.
Journal of Systems and Software, 1998

Towards Logic Programming Based Coordination in Virtual Worlds.
Proceedings of the Thirty-First Annual Hawaii International Conference on System Sciences, 1998

1997
On Delphi Lemmas and other Memoing Techniques for Deterministic Logic Programs.
J. Log. Program., 1997

A Logic Programming Infrastructure for Remote Execution, Mobile Code and Agents.
Proceedings of the 6th Workshop on Enabling Technologies (WET-ICE '97), 1997

J iT I : Tracing Memory References for Data Race Detection.
Proceedings of the Parallel Computing: Fundamentals, 1997

Clock Snooping and its Application in on-the-fly Data Race Detection.
Proceedings of the 1997 International Symposium on Parallel Architectures, 1997

On Relating Blackboards in the µLog Coordination Model.
Proceedings of the 30th Annual Hawaii International Conference on System Sciences (HICSS-30), 1997

LogiMOO: A Multi-User Virtual World with Agents and Natural Language Programming.
Proceedings of the Human Factors in Computing Systems, 1997

1996
Blackboard-based Extensions in Prolog.
Softw., Pract. Exper., 1996

An Operator Precedence Parser for Standard Prolog Text.
Softw., Pract. Exper., 1996

Extending the µLog Framework with Local and Conditional Blackboard Operations.
J. Symb. Comput., 1996

Partial Translation: Towards a Portable and Efficient Prolog Implementation Technology.
J. Log. Program., 1996

µ2 Log: Towards Remote Coordination.
Proceedings of the Coordination Languages and Models, First International Conference, 1996

Towards Logic Programming Based Coordination in Virtual Worlds.
Proceedings of the Coordination Technology for Collaborative Applications, 1996

1995
Performance Evaluation of a Blackboard Using Stochastic Petri Nets.
Simulation, 1995

The power of partial tanslation: an experiment with the C-ification of binary Prolog.
Proceedings of the 1995 ACM symposium on applied computing, 1995

On Composing Concurrent Logic Processes.
Proceedings of the Logic Programming, 1995

1994
On the semantics of μ Log.
Future Generation Comp. Syst., 1994

High performance continuation passing style Prolog-to-C mapping.
Proceedings of the 1994 ACM Symposium on Applied Computing, 1994

Call Forwarding: A Simple Interprocedural Optimization Technique for Dynamically Typed Languages.
Proceedings of the Conference Record of POPL'94: 21st ACM SIGPLAN-SIGACT Symposium on Principles of Programming Languages, 1994

Process-Based Parallel Logic Programming: A Survey of the Basic Issues.
Proceedings of the ICPL 1994 Workshop W1: Process-Based Parallel Logic Programming, 1994

1993
Blackboard-based Extensions for Parallel Programming in BinProlog.
Proceedings of the Logic Programming, 1993

Some low-level issues in the implementation of a shared blackboard.
Proceedings of the 1993 Euromicro Workshop on Parallel and Distributed Processing, 1993

Blackboard Communication in Logic Programming.
Proceedings of the Parallel Computing: Trends and Applications, 1993

Memoing with Abstract Answers and Delphi Lemmas.
Proceedings of the Logic Program Synthesis and Transformation, 1993

Non-Associative Blackboard Programming.
Proceedings of the ICLP'93 Post-Conference Workshop on Blackboard-Based Logic Programming, 1993

Call Forwarding: A Simple Low-Level Code Optimization Technique.
Proceedings of the Implementations of Logic Programming Systems: Papers from the ICLP 1993 Workshops: Practical Implementations and Systems Experience in Logic Programming Systems, 1993

Some Issues in the Implementation of a Unix-based Blackboard.
Proceedings of the ICLP'93 Post-Conference Workshop on Blackboard-Based Logic Programming, 1993

Multi-Prolog: Definition, Operational Semantics and Implementation.
Proceedings of the Logic Programming, 1993

1992
Comparative Semantics of µLog.
Proceedings of the PARLE '92: Parallel Architectures and Languages Europe, 1992

jc: An Efficient and Portable Sequential Implementation of Janus.
Proceedings of the Logic Programming, 1992

Multi-Prolog: a Blackboard-based Parallel Logic Programming Language.
Proceedings of the Workshop on Concurrent and Parallel Implementations (sessions A and B), 1992

1991
Blackboard Communication in Prolog.
Proceedings of the Parallel Execution of Logic Programs, 1991


  Loading...