Fábio Luís Livi Ramos

According to our database, Fábio Luís Livi Ramos authored at least 15 papers between 2010 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2023

AV1 Residual Syntax Elements Assessment and Efficient VLSI Architecture.

Jiovana Sousa Gomes, Rodrigo N. Wuerdig, Fábio Luís Livi Ramos, Sergio Bampi

Proceedings of the 36th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design, 2023

Analysis of AV1 Arithmetic Decoder Design Space with a Novel Multi-Boolean Approach.

Jiovana Sousa Gomes, Tulio Pereira Bitencourt, Sergio Bampi, Fábio Luís Livi Ramos

Proceedings of the 14th IEEE Latin America Symposium on Circuits and System, 2023

2022

Low-Power High-Throughput Architecture for AV1 Arithmetic Decoder.

Jiovana Sousa Gomes, Tulio Pereira Bitencourt, Sergio Bampi, Fábio Luís Livi Ramos

IEEE Des. Test, 2022

Power-Saving 8K Real-Time AV1 Arithmetic Encoder Architecture.

Tulio Pereira Bitencourt, Fábio Luís Livi Ramos, Sergio Bampi

IEEE Des. Test, 2022

Area and Power Efficient 8K Real-Time Design for AV1 Arithmetic Decoding.

Jiovana Sousa Gomes, Tulio Pereira Bitencourt, Sergio Bampi, Fábio Luís Livi Ramos

Proceedings of the Picture Coding Symposium, 2022

Power-Throughput Trade-off Analysis for a Novel Multi-Boolean AV1 Arithmetic Encoder Design.

Tulio Pereira Bitencourt, Fábio Luís Livi Ramos, Sergio Bampi

Proceedings of the Picture Coding Symposium, 2022

2021

Energy-Throughput Configurable Design for Video Processing Binary Arithmetic Encoder.

Fábio Luís Livi Ramos, Bruno Zatt, Marcelo Schiavon Porto, Sergio Bampi

IEEE Trans. Circuits Syst. Video Technol., 2021

2020

Residual Syntax Elements Analysis and Design Targeting High-Throughput HEVC CABAC.

Fábio Luís Livi Ramos, Alessandro Via Piana Saggiorato, Bruno Zatt, Marcelo Schiavon Porto, Sergio Bampi

IEEE Trans. Circuits Syst. I Regul. Pap., 2020

2018

High-Throughput Binary Arithmetic Encoder using Multiple-Bypass Bins Processing for HEVC CABAC.

Fábio Luís Livi Ramos, Bruno Zatt, Marcelo Schiavon Porto, Sergio Bampi

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

HEVC Residual Syntax Elements Generation Architecture for High-Throughput CABAC Design.

Alessandro Via Piana Saggiorato, Fábio Luís Livi Ramos, Bruno Zatt, Marcelo Schiavon Porto, Sergio Bampi

Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018

2017

Novel multiple bypass bins scheme for low-power UHD video processing HEVC binary arithmetic encoder architecture.

Fábio Luís Livi Ramos, Bruno Zatt, Marcelo Schiavon Porto, Sergio Bampi

Proceedings of the 30th Symposium on Integrated Circuits and Systems Design: Chip on the Sands, 2017

Low-power multi-size HEVC DCT architecture proposal for QFHD video processing.

Luana Vieira Martinez Bonatto, Fábio Luís Livi Ramos, Bruno Zatt, Marcelo Schiavon Porto, Sergio Bampi

Proceedings of the 30th Symposium on Integrated Circuits and Systems Design: Chip on the Sands, 2017

Low-power HEVC binarizer architecture for the CABAC block targeting UHD video processing.

Camila de Matos Alonso, Fábio Luís Livi Ramos, Bruno Zatt, Marcelo Schiavon Porto, Sergio Bampi

Proceedings of the 30th Symposium on Integrated Circuits and Systems Design: Chip on the Sands, 2017

2016

Low-power hardware design for the HEVC Binary Arithmetic Encoder targeting 8K videos.

Fábio Luís Livi Ramos, Jones Goebel, Bruno Zatt, Marcelo Schiavon Porto, Sergio Bampi

Proceedings of the 29th Symposium on Integrated Circuits and Systems Design, 2016

2010

A high throughput CAVLC hardware architecture with parallel coefficients processing for HDTV H.264/AVC enconding.

Fábio Luís Livi Ramos, Bruno Zatt, Thaísa Leal da Silva, Altamiro Amadeu Susin, Sergio Bampi

Proceedings of the 17th IEEE International Conference on Electronics, 2010