Fakhar Anjam

Affiliations:
  • Delft University of Technology, Netherlands


According to our database1, Fakhar Anjam authored at least 12 papers between 2010 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
Article 
PhD thesis 
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Links

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Bibliography

2023
Speech Emotion Recognition Using Convolution Neural Networks and Multi-Head Convolutional Transformer.
Sensors, July, 2023

2013
Run-time Adaptable VLIW Processors: Resources, Performance, Power Consumption, and Reliability Trade-offs.
PhD thesis, 2013

Configurable Fault-Tolerance for a Configurable VLIW Processor.
Proceedings of the Reconfigurable Computing: Architectures, Tools and Applications, 2013

2012
Simultaneous reconfiguration of issue-width and instruction cache for a VLIW processor.
Proceedings of the 2012 International Conference on Embedded Computer Systems: Architectures, 2012

Adapting communication for adaptable processors: A multi-axis reconfiguration approach.
Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2012

A Run-Time Task Migration Scheme for an Adjustable Issue-Slots Multi-core Processor.
Proceedings of the Reconfigurable Computing: Architectures, Tools and Applications, 2012

2011
Targeting code diversity with run-time adjustable issue-slots in a chip multiprocessor.
Proceedings of the Design, Automation and Test in Europe, 2011

2010
Low-power, high-throughput deblocking filter for H.264/AVC.
Proceedings of the 2010 International Symposium on System on Chip, SoC 2010, Tampere, 2010

A shared reconfigurable VLIW multiprocessor system.
Proceedings of the 24th IEEE International Symposium on Parallel and Distributed Processing, 2010

A multiported register file with register renaming for configurable softcore VLIW processors.
Proceedings of the International Conference on Field-Programmable Technology, 2010

A VLIW softcore processor with dynamically adjustable issue-slots.
Proceedings of the International Conference on Field-Programmable Technology, 2010

Dynamically reconfigurable register file for a softcore VLIW processor.
Proceedings of the Design, Automation and Test in Europe, 2010


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