Fei Yuan
Orcid: 0000-0001-7758-5455Affiliations:
- Toronto Metropolitan University, Department of Electrical and Computer Engineering, Toronto, ON, Canada
- Ryerson University, Department of Electrical and Computer Engineering, Toronto, ON, Canada
- University of Waterloo, ON, Canada (PhD 1999)
According to our database1,
Fei Yuan
authored at least 116 papers
between 1999 and 2025.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
Online presence:
-
on torontomu.ca
-
on orcid.org
On csauthors.net:
Bibliography
2025
A Comparative Study of Dynamic Comparators for Low-Power Successive Approximation ADC.
IEEE Open J. Circuits Syst., 2025
IEEE Open J. Circuits Syst., 2025
Proceedings of the 23rd IEEE Interregional NEWCAS Conference, 2025
2024
Proceedings of the 22nd IEEE Interregional NEWCAS Conference, 2024
Proceedings of the 67th IEEE International Midwest Symposium on Circuits and Systems, 2024
Proceedings of the 67th IEEE International Midwest Symposium on Circuits and Systems, 2024
A 0.6-V 108-nW 100-kHz Sub-Threshold Delay-Locked Loop with Digital Linearization for Low-Power SAR ADC.
Proceedings of the 67th IEEE International Midwest Symposium on Circuits and Systems, 2024
Gated Ring Oscillator Time Amplifier with Pico-Second Sensitivity and Applications in All-Digital Variable-Gain Time Integrator.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024
An 800 kS/s 1.83 fJ/conv. 12b ADC via Voltage Successive Approximation and Gated Cyclic Vernier Time Digitization.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024
Sub-Threshold Delay-Locked Loop with Piecewise Linearization and Time-Mode Proportional-Integral Locking.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2024
2023
IEEE Trans. Circuits Syst. I Regul. Pap., September, 2023
Proceedings of the 21st IEEE Interregional NEWCAS Conference, 2023
Time-Interpolated Vernier Digital-to-Time Converter with Applications in Time-Mode SAR TDC.
Proceedings of the 21st IEEE Interregional NEWCAS Conference, 2023
Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023
A Cyclic Vernier Digital-to-Time Converter for Time-Mode Successive Approximation TDC.
Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023
All-Digital Time Integrator with Bi-Directional Gated Ring Oscillator / Shift Register.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023
2022
Metastability Error Correction for True Single-Phase Clock DFF With Applications in Vernier TDC.
IEEE Trans. Circuits Syst. II Express Briefs, 2022
Improved Metastability of True Single-Phase Clock D-Flipflops With Applications in Vernier Time-to-Digital Converters.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022
Gated Vernier delay line time integrator with applications in ΔΣ time-to-digital converter.
Microelectron. J., 2022
All-Digital Bi-Directional Gated Ring Oscillator Time Integrator for Mixed-Mode Signal Processing.
Proceedings of the 20th IEEE Interregional NEWCAS Conference, 2022
Bi-Directional Gated Ring Oscillator Time Integrator for Time-Based Mixed-Signal Processing.
Proceedings of the 65th IEEE International Midwest Symposium on Circuits and Systems, 2022
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
Proceedings of the IEEE Canadian Conference on Electrical and Computer Engineering, 2022
2021
Microelectron. J., 2021
IET Circuits Devices Syst., 2021
IET Circuits Devices Syst., 2021
Proceedings of the 64th IEEE International Midwest Symposium on Circuits and Systems, 2021
Proceedings of the 64th IEEE International Midwest Symposium on Circuits and Systems, 2021
Proceedings of the 64th IEEE International Midwest Symposium on Circuits and Systems, 2021
2020
IEEE Trans. Circuits Syst. II Express Briefs, 2020
Time-based all-digital Δ Σ time-to-digital converter with pre-skewed bi-directional gated delay line time integrator.
IET Circuits Devices Syst., 2020
All-digital power-efficient integrating frequency difference-to-digital converter for GHz frequency-locking.
IET Circuits Devices Syst., 2020
Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020
Area/Power-Efficient True-Single-Phase-Clock D-Flipflops with Improved Metastability.
Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020
2019
IET Circuits Devices Syst., 2019
Data-Transition Decision Feedback Equalizer with Edge-Emphasis Taps and Raised References.
Proceedings of the 17th IEEE International New Circuits and Systems Conference, 2019
All-Digital ∆Σ TDC with Current-Starved Bi-Directional Gated Delay Line Time Integrator.
Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019
Time-Mode All-Digital Delta-Sigma Time-to-Digital Converter with Process Uncertainty Calibration.
Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019
Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019
A Pre-Skewed Bi-Directional Gated Delay Line Bang-Bang Frequency Detector with Applications in 10 Gbps Serial Link Frequency-Locking.
Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019
Digitally Interpolated Pre-Skewed Delay-Line Digital-to-Time Converter with Minimum Nonlinearity and Latency.
Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019
2018
All-digital ΔΣ time-to-digital converter with Bi-Directional gated delay line time integrator.
Microelectron. J., 2018
IET Circuits Devices Syst., 2018
Proceedings of the 2018 IEEE Nordic Circuits and Systems Conference, 2018
Power-Silicon Efficient All-Digital △Σ TDC with Differential Gated Delay Line Time Integrator.
Proceedings of the 16th IEEE International New Circuits and Systems Conference, 2018
Data-Transition Decision Feedback Equalizer with S<sup>3</sup>-LMS Adaptation Algorithm.
Proceedings of the 16th IEEE International New Circuits and Systems Conference, 2018
A Comparative Study Of Injection Locked Frequency Divider Using Harmonic Mixer In Weak And Strong Inversion.
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018
2017
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017
All-digital ΔΣ TDC with differential bi-directional gated-delay-line time integrator.
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017
2016
Circuits Syst. Signal Process., 2016
Circuits Syst. Signal Process., 2016
A phasor-domain study of injection-locking of harmonic oscillators with multiple injections.
Proceedings of the 14th IEEE International New Circuits and Systems Conference, 2016
Proceedings of the 14th IEEE International New Circuits and Systems Conference, 2016
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
2015
A Quadrature Charge-Domain Sampling Mixer With Embedded FIR, IIR, and N-Path Filters.
IEEE Trans. Circuits Syst. I Regul. Pap., 2015
IET Circuits Devices Syst., 2015
A 12.88 MS/s 0.28 pJ/conv.step 8-bit stage-interleaved pulse-shrinking time-to-digital converter in 130 nm CMOS.
Proceedings of the IEEE 58th International Midwest Symposium on Circuits and Systems, 2015
0.25-4 ns 185 MS/s 4-bit pulse-shrinking time-to-digital converter in 130 nm CMOS using a 2-step conversion scheme.
Proceedings of the IEEE 58th International Midwest Symposium on Circuits and Systems, 2015
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
2014
IEEE Trans. Very Large Scale Integr. Syst., 2014
A new adaptive Decision Feedback Equalizer using hexagon eye-opening monitor for multi Gbps data links.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014
2013
Frequency-Domain Study of Lock Range of Non-Harmonic Oscillators With Multiple Multi-Tone Injections.
IEEE Trans. Circuits Syst. I Regul. Pap., 2013
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013
Low-power programmable charge-domain sampler with embedded N-path bandpass filter for software-defined radio.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013
Proceedings of the 42nd International Conference on Parallel Processing, 2013
Proceedings of the 2013 NASA/ESA Conference on Adaptive Hardware and Systems, 2013
2012
A Phasor-Domain Study of Lock Range of Harmonic Oscillators With Multiple Injections.
IEEE Trans. Circuits Syst. II Express Briefs, 2012
A frequency-domain study of lock range of harmonic oscillators with multiple injections.
Proceedings of the 10th IEEE International NEWCAS Conference, 2012
Proceedings of the 10th IEEE International NEWCAS Conference, 2012
2011
A Study of the Lock Range of Injection-Locked CMOS Active-Inductor Oscillators Using a Linear Control System Approach.
IEEE Trans. Circuits Syst. II Express Briefs, 2011
Proceedings of 20th International Conference on Computer Communications and Networks, 2011
Proceedings of the 24th Canadian Conference on Electrical and Computer Engineering, 2011
2010
A High-Gain Power-Matching Technique for Efficient Radio-Frequency Power Harvest of Passive Wireless Microsystems.
IEEE Trans. Circuits Syst. I Regul. Pap., 2010
Nonharmonic Injection-Locked Phase-Locked Loops With Applications in Remote Frequency Calibration of Passive Wireless Transponders.
IEEE Trans. Circuits Syst. I Regul. Pap., 2010
A step-up transformer impedance transformation technique for efficient power harvesting of passive transponders.
Microelectron. J., 2010
2009
Intersignal Timing Skew Compensation of Parallel Links With Voltage-Mode Incremental Signaling.
IEEE Trans. Circuits Syst. I Regul. Pap., 2009
Parallel links with current-mode incremental signaling and per-pin skew compensation.
Microelectron. J., 2009
A wide dynamic range CMOS image sensor with pulse-frequency-modulation and in-pixel amplification.
Microelectron. J., 2009
Inter-signal timing skew compensation of parallel links with current-mode incremental signalling.
IET Circuits Devices Syst., 2009
Remote Frequency Calibration of Passive Wireless Microsensors and Transponders using Injection-locked Phase-locked Loop.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009
A Wide Frequency Tuning Range Active-inductor Voltage-controlled Oscillator for Ultra Wideband Applications.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009
2008
IEEE Trans. Circuits Syst. II Express Briefs, 2008
IEEE Trans. Circuits Syst. II Express Briefs, 2008
Microelectron. J., 2008
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
Inter-signal timing skew compensation of parallel links with voltage-mode incremental signaling.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
2007
A New Current-Mode Incremental Signaling Scheme With Applications to Gb/s Parallel Links.
IEEE Trans. Circuits Syst. I Regul. Pap., 2007
IEEE Trans. Circuits Syst. II Express Briefs, 2007
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
2006
IEEE Trans. Circuits Syst. I Regul. Pap., 2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
A new power-area efficient 4-PAM full-clock CMOS pre-emphasis transmitter for 10Gb/s serial links.
Proceedings of the 16th ACM Great Lakes Symposium on VLSI 2006, Philadelphia, PA, USA, April 30, 2006
A 0.13<i><sub>µm</sub></i> CMOS 10 Gb/s current-mode class AB serial link transmitter with low supply voltage sensitivity.
Proceedings of the 16th ACM Great Lakes Symposium on VLSI 2006, Philadelphia, PA, USA, April 30, 2006
2005
IEICE Trans. Inf. Syst., 2005
2004
Inductive peaking in wideband CMOS current amplifiers.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
2003
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003
Proceedings of the 2003 10th IEEE International Conference on Electronics, 2003
2002
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2002
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
2001
Efficient transient analysis of nonlinear circuits using Volterra series and piecewise constant interpolation.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001
A new initialization technique in designing and testing phases of asynchronous circuits.
Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001
1999
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999
Sensitivity analysis of periodically switched linear circuits using an adjoint network technique.
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999