Saman Sadr

According to our database1, Saman Sadr authored at least 7 papers between 2011 and 2018.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2018
A 4-Lane 1.25-to-28.05Gb/s multi-standard 6pJ/b 40dB transceiver in 14nm FinFET with independent TX/RX rate support.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

2017
High speed ADCs for wireline applications.
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

2014
New 2-D Eye-Opening Monitor for Gb/s Serial Links.
IEEE Trans. Very Large Scale Integr. Syst., 2014

Performance of edge tap decision feedback equalization methods for wireline receivers.
Proceedings of the IEEE 12th International New Circuits and Systems Conference, 2014

Test considerations for jitter tolerance of wireline receivers.
Proceedings of the IEEE 27th Canadian Conference on Electrical and Computer Engineering, 2014

2012
A low jitter 2.7mW/Gbps 180Gb/s 12-lane transmitter in a 40nm CMOS technology.
Proceedings of the 38th European Solid-State Circuit conference, 2012

2011
An 8.4mW/Gb/s 4-lane 48Gb/s multi-standard-compliant transceiver in 40nm digital CMOS technology.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011


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