Felipe Cabarcas

Orcid: 0000-0002-8966-0405

According to our database1, Felipe Cabarcas authored at least 18 papers between 2001 and 2019.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

Online presence:

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Bibliography

2019
Efficient public-key operation in multivariate schemes.
Adv. Math. Commun., 2019

2012
DMA++: On the Fly Data Realignment for On-Chip Memories.
IEEE Trans. Computers, 2012

On the simulation of large-scale architectures using multiple application abstraction levels.
ACM Trans. Archit. Code Optim., 2012

2011
Castell: a heterogeneous cmp architecture scalable to hundreds of processors.
PhD thesis, 2011

Scalable multicore architectures for long DNA sequence comparison.
Concurr. Comput. Pract. Exp., 2011

Breaking the bandwidth wall in chip multiprocessors.
Proceedings of the 2011 International Conference on Embedded Computer Systems: Architectures, 2011

Trace-driven simulation of multithreaded applications.
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2011

Parametrizing multicore architectures for multiple sequence alignment.
Proceedings of the 8th Conference on Computing Frontiers, 2011

2010
The SARC Architecture.
IEEE Micro, 2010

Interleaving granularity on high bandwidth memory architecture for CMPs.
Proceedings of the 2010 International Conference on Embedded Computer Systems: Architectures, 2010

Task Superscalar: An Out-of-Order Task Pipeline.
Proceedings of the 43rd Annual IEEE/ACM International Symposium on Microarchitecture, 2010

Comparing last-level cache designs for CMP architectures.
Proceedings of the Second International Forum on Next-Generation Multicore/Manycore Technologies, 2010

Long DNA Sequence Comparison on Multicore Architectures.
Proceedings of the Euro-Par 2010 - Parallel Processing, 16th International Euro-Par Conference, Ischia, Italy, August 31, 2010

2009
CellSs: Scheduling techniques to better exploit memory hierarchy.
Sci. Program., 2009

2006
Turbo coding of strongly nonuniform memoryless sources with unequal energy allocation and PAM signaling.
IEEE Trans. Signal Process., 2006

Approaching the Slepian-Wolf boundary using practical channel codes.
Signal Process., 2006

2004
Source-controlled turbo coding of nonuniform memoryless sources based on unequal energy allocation.
Proceedings of the 2004 IEEE International Symposium on Information Theory, 2004

2001
Asymmetric energy allocation strategies to improve turbo codes performance.
Proceedings of the 54th IEEE Vehicular Technology Conference, 2001


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