Arnaldo Azevedo

According to our database, Arnaldo Azevedo authored at least 27 papers between 2003 and 2013.

Collaborative distances:

• Dijkstra number of three.
• Erdős number of four.

2013

Virtual execution platforms for mixed-time-criticality systems: the CompSOC architecture and design flow.

Kees Goossens, Arnaldo Azevedo, Karthik Chandrasekar, Manil Dev Gomony, Sven Goossens, Martijn Koedam, Yonghui Li, Davit Mirzoyan, Anca Mariana Molnos, Ashkan Beyranvand Nejad, Andrew Nelson, Shubhendu Sinha

SIGBED Rev., 2013

A reduced memory bandwidth and high throughput HDTV motion compensation decoder for H.264/AVC High 4: 2: 2 profile.

Bruno Zatt, Leandro M. de L. Silva, Arnaldo Azevedo, Luciano Volcan Agostini, Altamiro Amadeu Susin, Sergio Bampi

J. Real Time Image Process., 2013

2012

Scalable Parallel Programming Applied to H.264/AVC Decoding.

Ben H. H. Juurlink, Mauricio Alvarez-Mesa, Chi Ching Chi, Arnaldo Azevedo, Cor Meenderinck, Alex Ramírez

Springer Briefs in Computer Science, Springer, ISBN: 978-1-4614-2230-3, 2012

Architecture and design flow for a debug event distribution interconnect.

Arnaldo Azevedo, Bart Vermeulen, Kees Goossens

Proceedings of the 30th International IEEE Conference on Computer Design, 2012

2011

A Highly Scalable Parallel Implementation of H.264.

Arnaldo Azevedo, Ben H. H. Juurlink, Cor Meenderinck, Andrei Sergeevich Terechko, Jan Hoogerbrugge, Mauricio Alvarez, Alex Ramírez, Mateo Valero

Trans. High Perform. Embed. Archit. Compil., 2011

An Instruction to Accelerate Software Caches.

Arnaldo Azevedo, Ben H. H. Juurlink

Proceedings of the Architecture of Computing Systems - ARCS 2011, 2011

2010

The SARC Architecture.

Alex Ramírez, Felipe Cabarcas, Ben H. H. Juurlink, Mauricio Alvarez-Mesa, Friman Sánchez, Arnaldo Azevedo, Cor Meenderinck, Catalin Bogdan Ciobanu, Sebastián Isaza, Georgi Gaydadjiev

IEEE Micro, 2010

A Multidimensional Software Cache for Scratchpad-Based Systems.

Arnaldo Azevedo, Ben H. H. Juurlink

Int. J. Embed. Real Time Commun. Syst., 2010

2009

Parallel Scalability of Video Decoders.

Cor Meenderinck, Arnaldo Azevedo, Ben H. H. Juurlink, Mauricio Alvarez, Alex Ramírez

J. Signal Process. Syst., 2009

Evaluación del rendimiento paralelo en el nivel macro bloque del decodificador H.264 en una arquitectura multiprocesador cc-NUMA.

Mauricio Alvarez, Alex Ramírez, Mateo Valero, Arnaldo Azevedo, Cor Meenderinck

Rev. Avances en Sistemas Informática, 2009

An efficient software cache for H.264 motion compensation.

Arnaldo Azevedo, Ben H. H. Juurlink

Proceedings of the 2008 IEEE International Symposium on System-on-Chip, 2009

Scalability of Macroblock-level Parallelism for H.264 Decoding.

Mauricio Alvarez-Mesa, Alex Ramírez, Arnaldo Azevedo, Cor Meenderinck, Ben H. H. Juurlink, Mateo Valero

Proceedings of the 15th IEEE International Conference on Parallel and Distributed Systems, 2009

Parallel H.264 Decoding on an Embedded Multicore Processor.

Arnaldo Azevedo, Cor Meenderinck, Ben H. H. Juurlink, Andrei Sergeevich Terechko, Jan Hoogerbrugge, Mauricio Alvarez, Alex Ramírez

Proceedings of the High Performance Embedded Architectures and Compilers, 2009

Scalar Processing Overhead on SIMD-Only Architectures.

Arnaldo P. Azevedo Filho, Ben H. H. Juurlink

Proceedings of the 20th IEEE International Conference on Application-Specific Systems, 2009

2008

Analysis of video filtering on the cell processor.

Arnaldo Azevedo, Cor Meenderinck, Ben H. H. Juurlink, Mauricio Alvarez, Alex Ramírez

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

Analyzing Scalability of Deblocking Filter of H.264 via TLP Exploitation in a New Many-Core Architecture.

Roberto Giorgi, Zdravko Popovic, Nikola Puzovic, Arnaldo Azevedo, Ben H. H. Juurlink

Proceedings of the 11th Euromicro Conference on Digital System Design: Architectures, 2008

2007

Design and FPGA Prototyping of a H.264/AVC Main Profile.

Luciano Volcan Agostini, Arnaldo P. Azevedo Filho, Wagston T. Staehler, Vagner S. Rosa, Bruno Zatt, Ana Cristina Medina Pinto, Roger Endrigo Carvalho Porto, Sergio Bampi, Altamiro Amadeu Susin

J. Braz. Comput. Soc., 2007

FPGA Prototyping Strategy for a H.264/AVC Video Decoder.

Vagner S. Rosa, Wagston T. Staehler, Arnaldo Azevedo, Bruno Zatt, Roger Endrigo Carvalho Porto, Luciano Volcan Agostini, Sergio Bampi, Altamiro Amadeu Susin

Proceedings of the 18th IEEE International Workshop on Rapid System Prototyping (RSP 2007), 2007

Memory Hierarchy Targeting Bi-Predictive Motion Compensation for H.264/AVC Decoder.

Bruno Zatt, Arnaldo Azevedo, Luciano Volcan Agostini, Altamiro Amadeu Susin, Sergio Bampi

Proceedings of the 2007 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2007), 2007

MoCHA: a Bi-Predictive Motion Compensation Hardware for H.264/AVC Decoder Targeting HDTV.

Arnaldo Azevedo, Bruno Zatt, Luciano Volcan Agostini, Sergio Bampi

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

2006

Motion Compensation Decoder Architecture for H.264/AVC Main Profile Targeting HDTV.

Arnaldo Azevedo, Bruno Zatt, Luciano Volcan Agostini, Sergio Bampi

Proceedings of the IFIP VLSI-SoC 2006, 2006

FPGA Design of A H.264/AVC Main Profile Decoder for HDTV.

Luciano Volcan Agostini, Arnaldo Azevedo, Vagner S. Rosa, Eduardo A. Berriel, Tatiana Gadelha Serra dos Santos, Sergio Bampi, Altamiro Amadeu Susin

Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006

2005

Accelerating a Multiprocessor Reconfigurable Architecture with Pipelined VLIW Units.

Arnaldo Azevedo, Luciano Volcan Agostini, Flávio Rech Wagner, Sergio Bampi

Proceedings of the 16th IEEE International Workshop on Rapid System Prototyping (RSP 2005), 2005

2004

When reconfigurable architecture meets network-on-chip.

Rodrigo Soares, Ivan Saraiva Silva, Arnaldo Azevedo

Proceedings of the 17th Annual Symposium on Integrated Circuits and Systems Design, 2004

2003

A New Hybrid Parallel/Reconfigurable Architecture: The X4CP32.

Arnaldo Azevedo, Rodrigo Soares, Ivan Saraiva Silva

Proceedings of the 16th Annual Symposium on Integrated Circuits and Systems Design, 2003

X4CP32: A New Parallel/Reconfigurable General-Purpose Processor.

Rodrigo Soares, Arnaldo Azevedo, Ivan Saraiva Silva

Proceedings of the 15th Symposium on Computer Architecture and High Performance Computing (SBAC-PAD 2003), 2003

X4CP32: A Coarse Grain General Purpose Reconfigurable Microprocessor.

Rodrigo Soares, Arnaldo Azevedo, Ivan Saraiva Silva

Proceedings of the 17th International Parallel and Distributed Processing Symposium (IPDPS 2003), 2003