Jörn W. Janneck

According to our database1, Jörn W. Janneck authored at least 64 papers between 1998 and 2017.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2017
Clock-Gating of Streaming Applications for Energy Efficient Implementations on FPGAs.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2017

Aegis : Reliable Application Execution Over the Mobile Cloud.
Proceedings of the 8th International Conference on Ambient Systems, 2017

2016
Dataflow Programs Analysis and Optimization Using Model Predictive Control Techniques - Two Examples of Bounded Buffer Scheduling: Deadlock Avoidance and Deadlock Recovery Strategies.
Signal Processing Systems, 2016

Processes and actors: Translating Kahn processes to dataflow with firing.
Proceedings of the International Conference on Embedded Computer Systems: Architectures, 2016

High-level synthesis of dynamic dataflow programs on heterogeneous MPSoC platforms.
Proceedings of the International Conference on Embedded Computer Systems: Architectures, 2016

Trace-based manycore partitioning of stream-processing applications.
Proceedings of the 50th Asilomar Conference on Signals, Systems and Computers, 2016

High-level system synthesis and optimization of dataflow programs for MPSoCs.
Proceedings of the 50th Asilomar Conference on Signals, Systems and Computers, 2016

2015
Implementing a streaming application on a processor array: A case study on the Epiphany architecture.
Proceedings of the 49th Asilomar Conference on Signals, Systems and Computers, 2015

2014
Dataflow programs analysis and optimization using model predictive control techniques: An example of bounded buffer scheduling.
Proceedings of the 2014 IEEE Workshop on Signal Processing Systems, 2014

Software code generation for dynamic dataflow programs.
Proceedings of the 17th International Workshop on Software and Compilers for Embedded Systems, 2014

Characterizing communication behavior of dataflow programs using trace analysis.
Proceedings of the XIVth International Conference on Embedded Computer Systems: Architectures, 2014

Realizing Efficient Execution of Dataflow Actors on Manycores.
Proceedings of the 12th IEEE International Conference on Embedded and Ubiquitous Computing, 2014

TURNUS: An open-source design space exploration framework for dynamic stream programs.
Proceedings of the 2014 Conference on Design and Architectures for Signal and Image Processing, 2014

Execution trace graph analysis of dataflow programs: Bounded buffer scheduling and deadlock recovery using model predictive control.
Proceedings of the 2014 Conference on Design and Architectures for Signal and Image Processing, 2014

Mapping and scheduling of dataflow graphs - A systematic map.
Proceedings of the 48th Asilomar Conference on Signals, Systems and Computers, 2014

Dataflow machines.
Proceedings of the 48th Asilomar Conference on Signals, Systems and Computers, 2014

Finding fast action selectors for dataflow actors.
Proceedings of the 48th Asilomar Conference on Signals, Systems and Computers, 2014

2013
Methods to explore design space for MPEG RMC codec specifications.
Sig. Proc.: Image Comm., 2013

Partitioning and optimization of high level stream applications for multi clock domain architectures.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2013

Buffer optimization based on critical path analysis of a dataflow program design.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

TURNUS: A design exploration framework for dataflow system design.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

Design space exploration of high level stream programs on parallel architectures: A focus on the buffer size minimization and optimization problem.
Proceedings of the 8th International Symposium on Image and Signal Processing and Analysis, 2013

High-level synthesis of dataflow programs for signal processing systems.
Proceedings of the 8th International Symposium on Image and Signal Processing and Analysis, 2013

Design space exploration and implementation of RVC-CAL applications using the TURNUS framework.
Proceedings of the 2013 Conference on Design and Architectures for Signal and Image Processing, 2013

Turnus: A unified dataflow design space exploration framework for heterogeneous parallel systems.
Proceedings of the 2013 Conference on Design and Architectures for Signal and Image Processing, 2013

Representing Guard Dependencies in Dataflow Execution Traces.
Proceedings of the Fifth International Conference on Computational Intelligence, 2013

Actor classification using actor machines.
Proceedings of the 2013 Asilomar Conference on Signals, 2013

Systems design space exploration by serial dataflow program execution.
Proceedings of the 2013 Asilomar Conference on Signals, 2013

Multi-clock domain optimization for reconfigurable architectures in high-level dataflow applications.
Proceedings of the 2013 Asilomar Conference on Signals, 2013

2012
Profiling of Dataflow Programs Using Post Mortem Causation Traces.
Proceedings of the 2012 IEEE Workshop on Signal Processing Systems, 2012

Session TA8b3: Architecture and implementation of signal processing systems.
Proceedings of the Conference Record of the Forty Sixth Asilomar Conference on Signals, 2012

Dataflow programming in CAL - balancing expressiveness, analyzability, and implementability.
Proceedings of the Conference Record of the Forty Sixth Asilomar Conference on Signals, 2012

Toward efficient execution of dataflow actors.
Proceedings of the Conference Record of the Forty Sixth Asilomar Conference on Signals, 2012

Partitioning and mapping dynamic dataflow programs.
Proceedings of the Conference Record of the Forty Sixth Asilomar Conference on Signals, 2012

2011
Guest Editorial: Special Issue on Reconfigurable Video Coding.
Signal Processing Systems, 2011

Synthesizing Hardware from Dataflow Programs - An MPEG-4 Simple Profile Decoder Case Study.
Signal Processing Systems, 2011

Exploiting Statically Schedulable Regions in Dataflow Programs.
Signal Processing Systems, 2011

Overview of the MPEG Reconfigurable Video Coding Framework.
Signal Processing Systems, 2011

Optimization of portable parallel signal processing applications by design space exploration of dataflow programs.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2011

A machine model for dataflow actors and its applications.
Proceedings of the Conference Record of the Forty Fifth Asilomar Conference on Signals, 2011

2010
Reconfigurable video coding: a stream programming approach to the specification of new video coding standards.
Proceedings of the First Annual ACM SIGMM Conference on Multimedia Systems, 2010

Automated generation of an efficient MPEG-4 Reconfigurable Video Coding decoder implementation.
Proceedings of the 2010 Conference on Design & Architectures for Signal & Image Processing, 2010

MPEG Reconfigurable Video Coding.
Proceedings of the Handbook of Signal Processing Systems, 2010

2009
Exploring the Concurrency of an MPEG RVC Decoder Based on Dataflow Program Analysis.
IEEE Trans. Circuits Syst. Video Techn., 2009

An Integrated Environment for HW/SW Co-design based on a CAL Specification and HW/SW Code Generators.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

Exploiting statically schedulable regions in dataflow programs.
Proceedings of the IEEE International Conference on Acoustics, 2009

2008
OpenDF: a dataflow toolset for reconfigurable hardware and multicore systems.
SIGARCH Computer Architecture News, 2008

Automatic software synthesis of dataflow program: An MPEG-4 simple profile decoder case study.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2008

Synthesizing hardware from dataflow programs: An MPEG-4 simple profile decoder case study.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2008

Profiling dataflow programs.
Proceedings of the 2008 IEEE International Conference on Multimedia and Expo, 2008

2007
Reconfigurable Media Coding: Self-Describing Multimedia Bitstreams.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2007

Reconfigurable Media Coding: A New Specification Model for Multimedia Coders.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2007

2005
Counting Interface Automata and their Application in Static Analysis of Actor Models.
Proceedings of the Third IEEE International Conference on Software Engineering and Formal Methods (SEFM 2005), 2005

2004
Actor-oriented control system design: a responsible framework perspective.
IEEE Trans. Contr. Sys. Techn., 2004

A method for describing the syntax and semantics of UML statecharts.
Software and Systems Modeling, 2004

2003
Taming heterogeneity - the Ptolemy approach.
Proceedings of the IEEE, 2003

Actors and their Composition.
Formal Asp. Comput., 2003

Analysis-oriented semantics definition of visual languages.
Proceedings of the 2003 IEEE Symposium on Human Centric Computing Languages and Environments (HCC 2003), 2003

Modular Analysis of Dataflow Process Networks.
Proceedings of the Fundamental Approaches to Software Engineering, 2003

2002
Describing the Syntax and Semantics of UML Statecharts in a Heterogeneous Modelling Environment.
Proceedings of the Diagrammatic Representation and Inference, 2002

2001
A predicate-based approach to defining visual language syntax.
Proceedings of the 2002 IEEE CS International Symposium on Human-Centric Computing Languages and Environments (HCC 2001), 2001

Moses - a tool suite for visual modeling of discrete-event systems.
Proceedings of the 2002 IEEE CS International Symposium on Human-Centric Computing Languages and Environments (HCC 2001), 2001

1998
Generalizing Lookahead - Behavioral Prediction in Distributed Simulation.
Proceedings of the 12th Workshop on Parallel and Distributed Simulation, 1998

Design Patterns in Petri Net System Modeling.
Proceedings of the 4th International Conference on Engineering of Complex Computer Systems (ICECCS '98), 1998


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