Florian Dittmann

Affiliations:
  • University of Paderborn, Department of Computer Science, Germany


According to our database1, Florian Dittmann authored at least 34 papers between 2003 and 2012.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2012
A scalable platform for run-time reconfigurable satellite payload processing.
Proceedings of the 2012 NASA/ESA Conference on Adaptive Hardware and Systems, 2012

2009
Dynamic relocation of hybrid tasks: Strategies and methodologies.
Microprocess. Microsystems, 2009

State Machine Based Method for Consolidating Vehicle Data.
Proceedings of the Analysis, 2009

Implementation of the reconfiguration port scheduling on the erlangen slot machine.
Proceedings of the ACM/SIGDA 17th International Symposium on Field Programmable Gate Arrays, 2009

2008
Towards Advanced Information Fusion for Driver Assistant Systems of Modern Vehicles.
Proceedings of the 68th IEEE Vehicular Technology Conference, 2008

Part-E - A Tool for Reconfigurable System Design.
Proceedings of the ReConFig'08: 2008 International Conference on Reconfigurable Computing and FPGAs, 2008

Algorithmic skeletons for the design of partially reconfigurable systems.
Proceedings of the 22nd IEEE International Symposium on Parallel and Distributed Processing, 2008

Towards a Petri Net Based Approach to Model and Synthesise Dynamic Reconfiguration for FPGAs.
Proceedings of the 4th IEEE International Symposium on Electronic Design, 2008

2007
Methods to exploit reconfigurable fabrics: making reconfigurable systems mature.
PhD thesis, 2007

Exploration, Partitioning and Simulation of Reconfigurable Systems (Exploration, Partitionierung und Simulation rekonfigurierbarer Systeme).
it Inf. Technol., 2007

Algorithmic Skeletons for the Programming of Reconfigurable Systems.
Proceedings of the Software Technologies for Embedded and Ubiquitous Systems, 2007

Optimization techniques for a reconfigurable, self-timed, and bit-serial architecture.
Proceedings of the 20th Annual Symposium on Integrated Circuits and Systems Design, 2007

Dynamic Relocation of Hybrid Tasks: A Complete Design Flow.
Proceedings of the 3rd International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2007

Model and Methodology for the Synthesis of Heterogeneous and Partially Reconfigurable Systems.
Proceedings of the 21th International Parallel and Distributed Processing Symposium (IPDPS 2007), 2007

Caching in Real-time Reconfiguration Port Scheduling.
Proceedings of the FPL 2007, 2007

Latency Optimization for a Reconfigurable, Self-Timed, and Bit-Serial Architecture.
Proceedings of the 2007 International Conference on Engineering of Reconfigurable Systems & Algorithms, 2007

Hard real-time reconfiguration port scheduling.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

2006
Data Transfer Protocols for a Two Slot Based Reconfigurable Platform.
Proceedings of the 2nd International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2006

Reconfigurable Microkernel-based RTOS: Mechanisms and Methods for Run-Time Reconfiguration.
Proceedings of the 2006 IEEE International Conference on Reconfigurable Computing and FPGA's, 2006

Towards the Implementation of Path Concepts for a Reconfigurable Bit-Serial Synchronous Architecture.
Proceedings of the 2006 IEEE International Conference on Reconfigurable Computing and FPGA's, 2006

Applying single processor algorithms to schedule tasks on reconfigurable devices respecting reconfiguration times.
Proceedings of the 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), 2006

Reconfiguration Time Aware Processing on FPGAs.
Proceedings of the Dynamically Reconfigurable Architectures, 02.04. - 07.04.2006, 2006

Clock Frequency Variation of Partially Reconfigurable Systems.
Proceedings of the ARCS 2006, 2006

Scheduling Reconfiguration Activities of Run-Time Reconfigurable RTOS Using an Aperiodic Task Server.
Proceedings of the Reconfigurable Computing: Architectures and Applications, 2006

2005
Placement of intermodule connections on partially reconfigurable devices.
Proceedings of the 18th Annual Symposium on Integrated Circuits and Systems Design, 2005

Temporal Graph Placement on Mesh-Based Coarse Grain Reconfigurable Systems Using the Spectral Method.
Proceedings of the From Specification to Embedded Systems Application [International Embedded Systems Symposium, 2005

Efficient Execution on Reconfigurable Devices Using Concepts of Pipelining.
Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005

Path Concepts for a Reconfigurable Bit-Serial Synchronous Architecture.
Proceedings of the Embedded and Ubiquitous Computing, 2005

Optimizing Interface Implementation Costs Using Runtime Reconfigurable Systems.
Proceedings of The 2005 International Conference on Engineering of Reconfigurable Systems and Algorithms, 2005

A Y-Chart Based Tool for Reconfigurable System Design.
Proceedings of the 18th International Conference on Architecture of Computing Systems, 2005

2004
A New High-Level Synthesis Approach of a Synchronous Bit-Serial Architecture.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2004

A Self-Controlled and Dynamically Reconfigurable Architecture.
Proceedings of the Design Methods and Applications for Distributed Embedded Systems, 2004

Invariants for Distributed Local Control Elements of a New Synchronous Bit-Serial Architecture.
Proceedings of the 2nd IEEE International Workshop on Electronic Design, 2004

2003
Towards a High-Level Synthesis of Reconfigurable Bit-Serial Architectures.
Proceedings of the 16th Annual Symposium on Integrated Circuits and Systems Design, 2003


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