Christian Haubelt

According to our database1, Christian Haubelt authored at least 153 papers between 2002 and 2019.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2019
Low-complexity online correction and calibration of pedestrian dead reckoning using map matching and GPS.
Geo-spatial Information Science, 2019

Improving Pedestrian Dead Reckoning Using Likely Paths and Backtracking for Mobile Devices.
Proceedings of the IEEE International Conference on Pervasive Computing and Communications Workshops, 2019

Automated Sensor Firmware Development - Generation, Optimization, and Analysis.
Proceedings of the 22nd Workshop Methods and Description Languages for Modelling and Verification of Circuits and Systems, 2019

Model-based real time analysis of distributed human activity recognition stages in wireless sensor networks.
Proceedings of the 2019 ACM International Joint Conference on Pervasive and Ubiquitous Computing and Proceedings of the 2019 ACM International Symposium on Wearable Computers, 2019

2018
Time and Memory Efficient Online Piecewise Linear Approximation of Sensor Signals.
Sensors, 2018

Design Space Exploration with Answer Set Programming.
KI, 2018

MeNTor: A wireless-mesh-network-aware data dissemination overlay based on BitTorrent.
Ad Hoc Networks, 2018

Mini-Mesh: Practical assessment of a miniaturized IEEE 802.11n/s mesh testbed.
Proceedings of the 2018 IEEE Wireless Communications and Networking Conference, 2018

Energy Efficient On-Sensor Processing for Online Activity Recognition.
Proceedings of the 8th International Joint Conference on Pervasive and Embedded Computing and Communication Systems, 2018

Systematic Test Case Instance Generation for the Assessment of System-level Design Space Exploration Approaches.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen, 2018

Activity Recognition using Head Worn Inertial Sensors.
Proceedings of the 5th international Workshop on Sensor-based Activity Recognition and Interaction, 2018

Exact multi-objective design space exploration using ASPmT.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

On leveraging approximations for exact system-level design space exploration: work-in-progress.
Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis, 2018

Utilizing quad-trees for efficient design space exploration with partial assignment evaluation.
Proceedings of the 23rd Asia and South Pacific Design Automation Conference, 2018

2017
Introduction to Hardware/Software Codesign.
Proceedings of the Handbook of Hardware/Software Codesign., 2017

SysteMoC: A Data-Flow Programming Language for Codesign.
Proceedings of the Handbook of Hardware/Software Codesign., 2017

Performance Analysis of Weakly-Consistent Scenario-Aware Dataflow Graphs.
Signal Processing Systems, 2017

Accurate Sample Time Reconstruction of Inertial FIFO Data.
Sensors, 2017

Optimization of a novel WLAN Simulation Framework for Prototyping Network Applications and Protocols.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen, 2017

Towards energy efficient sensor nodes for online activity recognition.
Proceedings of the IECON 2017 - 43rd Annual Conference of the IEEE Industrial Electronics Society, Beijing, China, October 29, 2017

Enhancing symbolic system synthesis through ASPmT with partial assignment evaluation.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

2016
ViPMesh: A virtual prototyping framework for IEEE 802.11s wireless mesh networks.
Proceedings of the 12th IEEE International Conference on Wireless and Mobile Computing, 2016

Supporting composition in symbolic system synthesis.
Proceedings of the International Conference on Embedded Computer Systems: Architectures, 2016

Supporting Static Binding in Stream Rewriting for Heterogeneous Many-Core Architectures.
Proceedings of the 10th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2016

Statistical analysis and improvement of the repeatability and reproducibility of an evaluation method for IMUs on a smartphone.
Proceedings of the 8th ACM SIGCHI Symposium on Engineering Interactive Computing Systems, 2016

Dataflow-based modeling and performance analysis for online gesture recognition.
Proceedings of the 2016 2nd International Workshop on Modelling, 2016

Accurate Sample Time Reconstruction for Sensor Data Synchronization.
Proceedings of the Architecture of Computing Systems - ARCS 2016, 2016

2015
Targeted on-line data extraction with SystemXtract.
Proceedings of the 8th International Conference on Simulation Tools and Techniques, 2015

Throughput-optimizing Compilation of Dataflow Applications for Multi-Cores using Quasi-Static Scheduling.
Proceedings of the 18th International Workshop on Software and Compilers for Embedded Systems, 2015

Model-based Systems Engineering with Matlab/Simulink in the Railway Sector.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen, 2015

On the Influence of Hardware Design Options on Schedule Synthesis in Time-Triggered Real-Time Systems.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen, 2015

Improving Coordinated SMT-Based System Synthesis by Utilizing Domain-Specific Heuristics.
Proceedings of the Logic Programming and Nonmonotonic Reasoning, 2015

Exploiting thread-level parallelism in template-based gesture recognition with dynamic time warping.
Proceedings of the 2nd international Workshop on Sensor-based Activity Recognition and Interaction, 2015

A Mobile Camera-Based Evaluation Method of Inertial Measurement Units on Smartphones.
Proceedings of the Internet of Things. IoT Infrastructures, 2015

Sensor-based online hand gesture recognition on multi-core DSPs.
Proceedings of the 2015 IEEE Global Conference on Signal and Information Processing, 2015

Dynamic task mapping of graphics processing applications on many-core architectures through stream rewriting.
Proceedings of the 13th IEEE Symposium on Embedded Systems For Real-time Multimedia, 2015

Quasi-static scheduling of data flow graphs in the presence of limited channel capacities.
Proceedings of the 13th IEEE Symposium on Embedded Systems For Real-time Multimedia, 2015

A symbolic system synthesis approach for hard real-time systems based on coordinated SMT-solving.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

A Parametric Dataflow Model for the Speed and Distance Monitoring in Novel Train Control Systems.
Proceedings of the Cyber Physical Systems. Design, Modeling, and Evaluation, 2015

2014
Scheduling of Recursive and Dynamic Data-Flow Graphs Using Stream Rewriting.
Proceedings of the 26th IEEE International Symposium on Computer Architecture and High Performance Computing Workshop, 2014

Hybride Prototypisierung eines Sensorsubsystems.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen, 2014

Ein abstraktes SystemC-Modell zur Analyse und Leistungsabschätzung des europäischen Zugsicherungssystems ETCS.
Proceedings of the 44. Jahrestagung der Gesellschaft für Informatik, Informatik 2014, Big Data, 2014

Model-based actor multiplexing with application to complex communication protocols.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

A novel model for system-level decision making with combined ASP and SMT solving.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

Towards Tight Interaction of ASP and SMT Solving for System-Level Decision Making.
Proceedings of the ARCS 2014, 2014

Performance analysis of weakly-consistent scenario-aware dataflow graphs.
Proceedings of the 48th Asilomar Conference on Signals, Systems and Computers, 2014

2013
Integrated Modeling Using Finite State Machines and Dataflow Graphs.
, 2013

A rule-based quasi-static scheduling approach for static islands in dynamic dataflow graphs.
ACM Trans. Embedded Comput. Syst., 2013

A Programmable Graphics Processor based on Partial Stream Rewriting.
Comput. Graph. Forum, 2013

Dynamic task mapping onto multi-core architectures through stream rewriting.
Proceedings of the 2013 International Conference on Embedded Computer Systems: Architectures, 2013

Model-Based Representation of Schedules for Dataflow Graphs.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2013

A Combined Mapping and Routing Algorithm for 3D NoCs Based on ASP.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2013

Symbolic System Synthesis Using Answer Set Programming.
Proceedings of the Logic Programming and Nonmonotonic Reasoning, 2013

Representing mapping and scheduling decisions within dataflow graphs.
Proceedings of the 2013 Forum on specification and Design Languages, 2013

A novel graphics processor architecture based on partial stream rewriting.
Proceedings of the 2013 Conference on Design and Architectures for Signal and Image Processing, 2013

Using stream rewriting for mapping and scheduling data flow graphs onto many-core architectures.
Proceedings of the 2013 Asilomar Conference on Signals, 2013

2012
Model-Based Virtual Prototype Acceleration.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2012

IBM Parallel Sysplex design for the IBM z196 system.
IBM Journal of Research and Development, 2012

Virtual prototyping for efficient multi-core ECU development of driver assistance systems.
Proceedings of the 2012 International Conference on Embedded Computer Systems: Architectures, 2012

Exploiting Model-Knowledge in High-Level Synthesis.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2012

Variation-aware leakage power model extraction for system-level hierarchical power analysis.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

Hardware synthesis of recursive functions through partial stream rewriting.
Proceedings of the 49th Annual Design Automation Conference 2012, 2012

A Very Fast and Quasi-accurate Power-State-Based System-Level Power Modeling Methodology.
Proceedings of the Architecture of Computing Systems - ARCS 2012 - 25th International Conference, Munich, Germany, February 28, 2012

2011
Calibration and validation of software performance models for pedestrian detection systems.
Proceedings of the 2011 International Conference on Embedded Computer Systems: Architectures, 2011

Special session on "What's next for ESL".
Proceedings of the 2011 International Conference on Embedded Computer Systems: Architectures, 2011

Automatic generation of system-level virtual prototypes from streaming application models.
Proceedings of the 22nd IEEE International Symposium on Rapid System Prototyping, 2011

Integrated Temporal Planning, Module Selection and Placement of Tasks for Dynamic Networks-on-Chip.
Proceedings of the 25th IEEE International Symposium on Parallel and Distributed Processing, 2011

ESL power and performance estimation for heterogeneous MPSOCS using SystemC.
Proceedings of the 2011 Forum on Specification & Design Languages, 2011

A rule-based static dataflow clustering algorithm for efficient embedded software synthesis.
Proceedings of the Design, Automation and Test in Europe, 2011

Symbolic system synthesis in the presence of stringent real-time constraints.
Proceedings of the 48th Design Automation Conference, 2011

2010
Analysis of SystemC actor networks for efficient synthesis.
ACM Trans. Embedded Comput. Syst., 2010

A system-level synthesis approach from formal application models to generic bus-based MPSoCs.
Proceedings of the 2010 International Conference on Embedded Computer Systems: Architectures, 2010

Actor-oriented Modeling of Driver Assistance Systems for Efficient Multi-Core ECU Implementation.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2010

Integrating Hardware/Firmware Verification Efforts Using SystemC High-Level Models.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2010

Symbolic system level reliability analysis.
Proceedings of the 2010 International Conference on Computer-Aided Design, 2010

Efficient High-Level modeling in the networking domain.
Proceedings of the Design, Automation and Test in Europe, 2010

Towards scalable system-level reliability analysis.
Proceedings of the 47th Design Automation Conference, 2010

Improving platform-based system synthesis by satisfiability modulo theories solving.
Proceedings of the 8th International Conference on Hardware/Software Codesign and System Synthesis, 2010

ReCoNets - Design Methodology for Embedded Systems Consisting of Small Networks of Reconfigurable Nodes and Connections.
Proceedings of the Dynamically Reconfigurable Systems - Architectures, 2010

Digitale Hardware/Software-Systeme: Spezifikation und Verifikation
eXamen.press, Springer, ISBN: 978-3-642-05355-9, 2010

Integrated Modeling using Finite State Machines and Dataflow Graphs.
Proceedings of the Handbook of Signal Processing Systems, 2010

2009
SystemCoDesigner - an automatic ESL synthesis approach by design space exploration and behavioral synthesis for streaming applications.
ACM Trans. Design Autom. Electr. Syst., 2009

Electronic System-Level Synthesis Methodologies.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2009

Designing multi-processor Systems-on-Chip.
Proceedings of the Annual IEEE International SoC Conference, SoCC 2009, 2009

Testfallgenerierung für SystemC-Designs mit abstrakten Modellbeschreibungen.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2009

Efficient approximately-timed performance modeling for architectural exploration of MPSoCs.
Proceedings of the Forum on specification and Design Languages, 2009

Combined system synthesis and communication architecture exploration for MPSoCs.
Proceedings of the Design, Automation and Test in Europe, 2009

Model-based synthesis and optimization of static multi-rate image processing algorithms.
Proceedings of the Design, Automation and Test in Europe, 2009

Incorporating graceful degradation into embedded system design.
Proceedings of the Design, Automation and Test in Europe, 2009

2008
Multi-objective routing and topology optimization in networked embedded systems.
Proceedings of the 2008 International Conference on Embedded Computer Systems: Architectures, 2008

Symbolic Reliability Analysis of Self-healing Networked Embedded Systems.
Proceedings of the Computer Safety, 2008

Classification of General Data Flow Actors into Known Models of Computation.
Proceedings of the 6th ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2008), 2008

Semi-Automatic Generation of mixed Hardware/Software Prototypes from Simulink Models.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2008

Symbolische Modellprüfung Aktor-orientierter High-level SystemC-Modelle mit Intervalldiagrammen.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2008

Symbolic Scheduling of SystemC Dataflow Designs.
Proceedings of the Languages for Embedded Systems and their Applications, 2008

Symbolic Quasi-Static Scheduling of Actor-Oriented SystemC Models.
Proceedings of the Forum on specification and Design Languages, 2008

Efficient Reconfigurable On-Chip Buses for FPGAs.
Proceedings of the 16th IEEE International Symposium on Field-Programmable Custom Computing Machines, 2008

A generalized static data flow clustering algorithm for mpsoc scheduling of multimedia applications.
Proceedings of the 8th ACM & IEEE International conference on Embedded software, 2008

Symbolic Reliability Analysis and Optimization of ECU Networks.
Proceedings of the Design, Automation and Test in Europe, 2008

Concurrent topology and routing optimization in automotive network integration.
Proceedings of the 45th Design Automation Conference, 2008

SystemCoDesigner: automatic design space exploration and rapid prototyping from behavioral models.
Proceedings of the 45th Design Automation Conference, 2008

Symbolic voter placement for dependability-aware system synthesis.
Proceedings of the 6th International Conference on Hardware/Software Codesign and System Synthesis, 2008

A feasibility-preserving local search operator for constrained discrete optimization problems.
Proceedings of the IEEE Congress on Evolutionary Computation, 2008

Efficient symbolic multi-objective design space exploration.
Proceedings of the 13th Asia South Pacific Design Automation Conference, 2008

Topology-Aware Replica Placement in Fault-Tolerant Embedded Networks.
Proceedings of the Architecture of Computing Systems, 2008

Synthesis of Multi-dimensional High-Speed FIFOs for Out-of-Order Communication.
Proceedings of the Architecture of Computing Systems, 2008

Dynamic Reconfiguration of FlexRay Schedules for Response Time Reduction in Asynchronous Fault-Tolerant Networks.
Proceedings of the Architecture of Computing Systems, 2008

Concepts for Self-Adaptive and Self-Healing Networked Embedded Systems.
Proceedings of the Organic Computing, 2008

2007
Design space exploration of reliable networked embedded systems.
Journal of Systems Architecture, 2007

Exploration, Partitioning and Simulation of Reconfigurable Systems (Exploration, Partitionierung und Simulation rekonfigurierbarer Systeme).
it - Information Technology, 2007

A SystemC-Based Design Methodology for Digital Signal Processing Systems.
EURASIP J. Emb. Sys., 2007

Solving Multi-objective Pseudo-Boolean Problems.
Proceedings of the Theory and Applications of Satisfiability Testing, 2007

Simulative Buffer Analysis of Local Image Processing Algorithms Described by Windowed Synchronous Data Flow.
Proceedings of the 2007 International Conference on Embedded Computer Systems: Architectures, 2007

Towards a Unified Execution Model for Transactions in TLM.
Proceedings of the 5th ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2007), May 30, 2007

System Level Modeling and Performance Simulation for Dynamic Reconfigurable Computing Systems in SystemC.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2007

Modeling and Synthesis of Hardware-Software Morphing.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

Efficient hardware checkpointing: concepts, overhead analysis, and implementation.
Proceedings of the ACM/SIGDA 15th International Symposium on Field Programmable Gate Arrays, 2007

Mapping Actor-Oriented Models to TLM Architectures.
Proceedings of the Forum on specification and Design Languages, 2007

Actor-Oriented Modeling and Simulation of Sliding Window Image Processing Algorithms.
Proceedings of the 2007 5th Workshop on Embedded Systems for Real-Time Multimedia, 2007

Interactive presentation: Reliability-aware system synthesis.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

SAT-decoding in evolutionary algorithms for discrete constrained optimization problems.
Proceedings of the IEEE Congress on Evolutionary Computation, 2007

Digitale Hardware/Software-Systeme: Synthese und Optimierung, 2. Auflage
eXamen.press, Springer, ISBN: 978-3-540-46822-6, 2007

2006
Modeling and Design of Fault-Tolerant and Self-Adaptive Reconfigurable Networked Embedded Systems.
EURASIP J. Emb. Sys., 2006

Dynamic task binding for hardware/software reconfigurable networks.
Proceedings of the 19th Annual Symposium on Integrated Circuits and Systems Design, 2006

Multi-Objective Topology Optimization for Networked Embedded Systems.
Proceedings of 2006 International Conference on Embedded Computer Systems: Architectures, 2006

Assertion-Based Verification of Transaction Level Models.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2006

Improving System Level Design Space Exploration by Incorporating SAT-Solvers into Multi-Objective Evolutionary Algorithms.
Proceedings of the 2006 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006), 2006

Modeling and Analysis of Windowed Synchronous Algorithms.
Proceedings of the 2006 IEEE International Conference on Acoustics Speech and Signal Processing, 2006

Automatic Test Case Generation with NuSMV.
Proceedings of the Informatik 2006, 2006

Formalizing TLM with Communicating State Machines.
Proceedings of the Forum on specification and Design Languages, 2006

Efficient Representation and Simulation of Model-Based Designs.
Proceedings of the Forum on specification and Design Languages, 2006

Symbolic Archive Representation for a Fast Nondominance Test.
Proceedings of the Evolutionary Multi-Criterion Optimization, 4th International Conference, 2006

Task-accurate performance modeling in SystemC for real-time multi-processor architectures.
Proceedings of the Conference on Design, Automation and Test in Europe, 2006

An Operating System Infrastructure for Fault-Tolerant Reconfigurable Networks.
Proceedings of the Architecture of Computing Systems, 2006

2005
Automatic model based design space exploration for embedded systems: a system level approach.
PhD thesis, 2005

SPI-Workbench - Modellierung, Analyse und Optimierung eingebetteter Systeme.
Proceedings of the INFORMATIK 2005, 2005

Improving EA-based design space exploration by utilizing symbolic feasibility tests.
Proceedings of the Genetic and Evolutionary Computation Conference, 2005

Initial Population Construction for Convergence Improvement of MOEAs.
Proceedings of the Evolutionary Multi-Criterion Optimization, 2005

Distributed HW/SW-Partitioning for Embedded Reconfigurable Networks.
Proceedings of the 2005 Design, 2005

Modeling and analysis of indirect communication in particle swarm optimization.
Proceedings of the IEEE Congress on Evolutionary Computation, 2005

Online hardware/software partitioning in networked embedded systems.
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005

A system-level approach to hardware reconfigurable systems.
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005

Using Symbolic Feasibility Tests during Design Space Exploration of Heterogeneous Multi-Processor Systems.
Proceedings of the 16th IEEE International Conference on Application-Specific Systems, 2005

2004
Basic OS Support for Distributed Reconfigurable Hardware.
Proceedings of the Computer Systems: Architectures, 2004

Design Space Exploration for Distributed Hardware Reconfigurable Systems.
Proceedings of the Field Programmable Logic and Application, 2004

2003
ReCoNet: Modeling and Implementation of Fault Tolerant Distributed Reconfigurable Hardware.
Proceedings of the 16th Annual Symposium on Integrated Circuits and Systems Design, 2003

Fault Tolerances Analysis of Distributed Reconfigurable Systems Using SAT-Based Techniques.
Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003

Solving Hierarchical Optimization Problems Using MOEAs.
Proceedings of the Evolutionary Multi-Criterion Optimization, 2003

SAT-Based Techniques in System Synthesis.
Proceedings of the 2003 Design, 2003

Accelerating design space exploration using pareto-front arithmetics.
Proceedings of the 2003 Asia and South Pacific Design Automation Conference, 2003

2002
Flexibility/Cost-Tradeoffs of Platform-Based Systems.
Proceedings of the Embedded Processor Design Challenges: Systems, Architectures, Modeling, and Simulation, 2002

Modellierung rekonfigurierbarer Systemarchitekturen.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2002

System Design for Flexibility.
Proceedings of the 2002 Design, 2002


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