Francesco Vigli

According to our database, Francesco Vigli authored at least 3 papers between 2019 and 2021.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2021

A Fault Tolerant soft-core obtained from an Interleaved-Multi- Threading RISC- V microprocessor design.

Marcello Barbirotta, Abdallah Cheikh, Antonio Mastrandrea, Francesco Menichelli, Francesco Vigli, Mauro Olivieri

Proceedings of the 36th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2021

2020

Fault resilience analysis of a RISC-V microprocessor design through a dedicated UVM environment.

Marcello Barbirotta, Antonio Mastrandrea, Francesco Menichelli, Francesco Vigli, Luigi Blasi, Abdallah Cheikh, Stefano Sordillo, Fabio Di Gennaro, Mauro Olivieri

Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2020

2019

A RISC-V Fault-Tolerant Microcontroller Core Architecture Based on a Hardware Thread Full/Partial Protection and a Thread-Controlled Watch-Dog Timer.

Luigi Blasi, Francesco Vigli, Abdallah Cheikh, Antonio Mastrandrea, Francesco Menichelli, Mauro Olivieri

Proceedings of the Applications in Electronics Pervading Industry, Environment and Society, 2019